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Message-ID: <hktw42pbb4rk3azapasigphhlbndkh5pmcm6fucdvk3ukoiull@dpoh7amjyymh>
Date: Thu, 25 Sep 2025 14:48:07 +0200
From: Sebastian Reichel <sre@...nel.org>
To: Marek Vasut <marek.vasut@...lbox.org>
Cc: Neil Armstrong <neil.armstrong@...aro.org>, 
	Jessica Zhang <jessica.zhang@....qualcomm.com>, Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, 
	Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, 
	David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>, 
	Michael Riesch <michael.riesch@...labora.com>, dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org, 
	kernel@...labora.com, Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>
Subject: Re: [PATCH] drm/panel: sitronix-st7789v: fix sync flags for
 t28cp45tn89

Hello Marek,

On Thu, Sep 25, 2025 at 02:15:41AM +0200, Marek Vasut wrote:
> On 9/24/25 11:46 PM, Sebastian Reichel wrote:
> > From: Sebastian Reichel <sebastian.reichel@...labora.com>
> > 
> > I planned to set the polarity of horizontal and vertical sync, but
> > accidentally described vertical sync twice with different polarity
> > instead.
> > 
> > Note, that there is no functional change, because the driver only
> > makes use of DRM_MODE_FLAG_P[HV]SYNC to divert from the default
> > active-low polarity.
> > 
> > Reported-by: Laurent Pinchart <laurent.pinchart+renesas@...asonboard.com>
> > Closes: https://lore.kernel.org/all/20250923132616.GH20765@pendragon.ideasonboard.com/
> > Fixes: a411558cc143 ("drm/panel: sitronix-st7789v: add Inanbo T28CP45TN89 support")
> > Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
> > ---
> >   drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
> > index 04d91929eedda092b966b8cffdef5b267748f190..dedf0a390a88dd45a8179e2d22e872128c87cfda 100644
> > --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
> > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
> > @@ -261,7 +261,7 @@ static const struct drm_display_mode t28cp45tn89_mode = {
> >   	.vtotal = 320 + 8 + 4 + 4,
> >   	.width_mm = 43,
> >   	.height_mm = 57,
> > -	.flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC,
> > +	.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC,
> Is this panel somehow special with its NHSYNC / PVSYNC , compared to the
> other supported panels, which all use PHSYNC / PVSYNC ? I would expect all
> of these DSI TCON to use the same polarity, how come this one needs NHSYNC ?

I wrote this based on reverse engineering incl. quite a bit try-and-error and
don't have very good data about the panel. Using DRM_MODE_FLAG_PHSYNC like all
the other panels results in garbage data on the display.

Greetings,

-- Sebastian

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