[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <mztchl7blmp5cdjiyg2btl65o2jrydpn4m3fc2liyxjci5vish@k33bvcyvz25j>
Date: Sat, 27 Sep 2025 01:33:27 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Abel Vesa <abel.vesa@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Pankaj Patil <pankaj.patil@....qualcomm.com>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] arm64: dts: qcom: glymur: Describe display related
nodes
On Fri, Sep 26, 2025 at 09:50:22AM +0300, Abel Vesa wrote:
> On 25-09-25 20:11:11, Dmitry Baryshkov wrote:
> > On Thu, Sep 25, 2025 at 06:02:48PM +0300, Abel Vesa wrote:
> > > The MDSS (Mobile Display SubSystem) on Glymur comes with 4 DisplayPort
> > > controllers. Describe them along with display controller and the eDP
> > > PHY. Then, attach the combo PHYs link and vco_div clocks to the Display
> > > clock controller and link up the PHYs and DP endpoints in the graph.
> > >
> > > Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> > > ---
> > > arch/arm64/boot/dts/qcom/glymur.dtsi | 492 ++++++++++++++++++++++++++++++++++-
> > > 1 file changed, 484 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> > > index a131cd6c3d9e7f14ed1c4aef4b68e1860cc3bca5..41d89998b1fe14a24cd528e73afc37cf2a840bab 100644
> > > --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
>
> [...]
>
> > > + mdss_dp0: displayport-controller@...4000 {
> > > + compatible = "qcom,glymur-dp";
> > > + reg = <0x0 0xaf54000 0x0 0x104>,
> > > + <0x0 0xaf54200 0x0 0xc0>,
> > > + <0x0 0xaf55000 0x0 0x770>,
> > > + <0x0 0xaf56000 0x0 0x9c>,
> > > + <0x0 0xaf57000 0x0 0x9c>;
> > > +
> > > + interrupts-extended = <&mdss 12>;
> > > +
> > > + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
> > > + <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>,
> > > + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>,
> > > + <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
> > > + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
> >
> > No pixel1 clock?
>
> Will add it in next version. Everywhere.
Except DP3, if I'm not mistaken.
>
> > > +
> > > + mdss_dp1: displayport-controller@...c000 {
> > > + compatible = "qcom,glymur-dp", "qcom,sm8650-dp";
> >
> > This doesn't match your own bindings. WT?
>
> Urgh. Yep, this is wrong. sm8650 compatible needs to be dropped. Will do
> in the next version.
>
> > > +
> > > + mdss_dp1_opp_table: opp-table {
> > > + compatible = "operating-points-v2";
> >
> > Is it differnt from dp0 table?
>
> Nope, they are the same. Will use the dp0 table for all controllers.
>
> Thanks for reviewing.
>
> Abel
--
With best wishes
Dmitry
Powered by blists - more mailing lists