linux-kernel - Re: [PATCH RFC 1/3] coresight: tmc: add the handle of the event to the path

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Message-ID: <CAJ9a7VgvWHO5h9-VbSruAqLfgocbkRjzsY+THPHVbJT2OXUO1w@mail.gmail.com>
Date: Fri, 26 Sep 2025 11:05:26 +0100
From: Mike Leach <mike.leach@...aro.org>
To: Leo Yan <leo.yan@....com>
Cc: James Clark <james.clark@...aro.org>, Suzuki K Poulose <suzuki.poulose@....com>, 
	Jie Gan <jie.gan@....qualcomm.com>, Carl Worth <carl@...amperecomputing.com>, 
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>, 
	Tingwei Zhang <tingwei.zhang@....qualcomm.com>, coresight@...ts.linaro.org, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RFC 1/3] coresight: tmc: add the handle of the event to
 the path

On Thu, 25 Sept 2025 at 17:04, Leo Yan <leo.yan@....com> wrote:
>
> On Thu, Sep 25, 2025 at 11:10:51AM +0100, James Clark wrote:
>
> > > > I would suggest in the csdev (coresight_device) structure itself. We
> > > > already have some sink specific data in here e.g. perf_sink_id_map.
>
> [...]
>
> > > I think this data is specific to the session we are enabling the
> > > device(s) in. e.g., we keep the trace-id in the path.
> > > So, I don't mind having this in the path structure.
> > > Instead of modifying csdev with additional locking from "etm-perf"
> > > it is always cleaner to handle this in the path.
> >
> > Yeah, and perf_sink_id_map only "needs" to be in the csdev because it
> > controls sharing IDs between multiple paths which can't be accomplished by
> > storing it in the path.
>
> This is a bit off-topic: do we really need to maintain an id_map in
> every sink device, or could we simply use a global id_map?
>
> I might miss some info; anyway, consolidating trace IDs is a low
> priority for me and not critical to this thread. But this might be
> benefit for later refactoring.
>
> Thanks,
> Leo

There is a limit to the number of IDs that can be used - using ID map
per sink means that IDs can be re-used in different sinks.

This was added to overcome this problem in large multi-core systems
where there are more PEs than Available IDs.

Mike


-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK