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Message-ID: <20250926102823.GAaNZqxzXkasrXXFjn@fat_crate.local>
Date: Fri, 26 Sep 2025 12:28:23 +0200
From: Borislav Petkov <bp@...en8.de>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: x86-ml <x86@...nel.org>, lkml <linux-kernel@...r.kernel.org>
Subject: [GIT PULL] x86/apic for v6.18-rc1

Hi Linus,

please pull the x86/apic lineup for v6.18-rc1.

The AMD SEV (encrypted guests and hypervisor support) side of things received
a lot of development this time around and you should be getting a lot of code
from several trees.

Even this branch contains two big features because it was deemed a better idea
to merge them into one.

So there might be other merge conflicts, like with the crypto tree, for
example:

https://lore.kernel.org/r/aM1bJqhtojdLhp3c@sirena.org.uk

The resolution should be easy but lemme give you a heads-up anyway.

Thx.

---

The following changes since commit 7f830e126dc357fc086905ce9730140fd4528d66:

  x86/sev: Guard sev_evict_cache() with CONFIG_AMD_MEM_ENCRYPT (2025-09-15 18:29:43 +0200)

are available in the Git repository at:

  ssh://git@...olite.kernel.org/pub/scm/linux/kernel/git/tip/tip tags/x86_apic_for_v6.18_rc1

for you to fetch changes up to 1f6113ae5ac4927fe80256154ebb0461e670fa85:

  x86/boot: Drop erroneous __init annotation from early_set_pages_state() (2025-09-24 18:08:34 +0200)

----------------------------------------------------------------
- Add functionality to provide runtime firmware updates for the non-x86 parts
  of an AMD platform like the security processor (ASP) firmware, modules
  etc, for example. The intent being that these updates are interim,
  live fixups before a proper BIOS update can be attempted

- Add guest support for AMD's Secure AVIC feature which gives encrypted
  guests the needed protection against a malicious hypervisor generating
  unexpected interrupts and injecting them into such guest, thus
  interfering with its operation in an unexpected and negative manner.
  The advantage of this scheme is that the guest determines which
  interrupts and when to accept them vs leaving that to the benevolence
  (or not) of the hypervisor

- Strictly separate the startup code from the rest of the kernel where
  former is executed from the initial 1:1 mapping of memory. The problem
  was that the toolchain-generated version of the code was being
  executed from a different mapping of memory than what was "assumed"
  during code generation, needing an ever-growing pile of fixups for
  absolute memory references which are invalid in the early, 1:1 memory
  mapping during boot.

  The major advantage of this is that there's no need to check the 1:1
  mapping portion of the code for absolute relocations anymore and get
  rid of the RIP_REL_REF() macro sprinkling all over the place.

  For more info, see Ard's very detailed writeup on this:
  https://lore.kernel.org/r/CAMj1kXEzKEuePEiHB%2BHxvfQbFz0sTiHdn4B%2B%2BzVBJ2mhkPkQ4Q@mail.gmail.com

- The usual cleanups and fixes

----------------------------------------------------------------
Ard Biesheuvel (23):
      x86/sev: Separate MSR and GHCB based snp_cpuid() via a callback
      x86/sev: Use MSR protocol for remapping SVSM calling area
      x86/sev: Use MSR protocol only for early SVSM PVALIDATE call
      x86/sev: Run RMPADJUST on SVSM calling area page to test VMPL
      x86/sev: Move GHCB page based HV communication out of startup code
      x86/sev: Avoid global variable to store virtual address of SVSM area
      x86/sev: Share implementation of MSR-based page state change
      x86/sev: Pass SVSM calling area down to early page state change API
      x86/sev: Use boot SVSM CA for all startup and init code
      x86/boot: Drop redundant RMPADJUST in SEV SVSM presence check
      x86/boot: Provide PIC aliases for 5-level paging related constants
      x86/sev: Provide PIC aliases for SEV related data objects
      x86/sev: Move __sev_[get|put]_ghcb() into separate noinstr object
      x86/sev: Export startup routines for later use
      objtool: Add action to check for absence of absolute relocations
      x86/boot: Check startup code for absence of absolute relocations
      x86/boot: Revert "Reject absolute references in .head.text"
      x86/kbuild: Incorporate boot/startup/ via Kbuild makefile
      x86/boot: Create a confined code area for startup code
      efistub/x86: Remap inittext read-execute when needed
      x86/boot: Move startup code out of __head section
      x86/boot: Get rid of the .head.text section
      x86/boot: Drop erroneous __init annotation from early_set_pages_state()

Ashish Kalra (3):
      x86/sev: Add new dump_rmp parameter to snp_leak_pages() API
      crypto: ccp - Add new HV-Fixed page allocation/free API
      crypto: ccp - Add AMD Seamless Firmware Servicing (SFS) driver

Borislav Petkov (AMD) (2):
      x86/apic/savic: Do not use snp_abort()
      x86/sev: Zap snp_abort()

Ingo Molnar (2):
      Merge branch 'x86/apic' into x86/sev, to resolve conflict
      Merge branch 'x86/urgent' into x86/apic, to resolve conflict

Kishon Vijay Abraham I (2):
      x86/sev: Initialize VGIF for secondary vCPUs for Secure AVIC
      x86/sev: Enable NMI support for Secure AVIC

Nathan Chancellor (1):
      objtool: Ignore __pi___cfi_ prefixed symbols

Neeraj Upadhyay (16):
      x86/apic: Add new driver for Secure AVIC
      x86/apic: Initialize Secure AVIC APIC backing page
      x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver
      x86/apic: Initialize APIC ID for Secure AVIC
      x86/apic: Add update_vector() callback for APIC drivers
      x86/apic: Add an update_vector() callback for Secure AVIC
      x86/apic: Add support to send IPI for Secure AVIC
      x86/apic: Support LAPIC timer for Secure AVIC
      x86/apic: Add support to send NMI IPI for Secure AVIC
      x86/apic: Allow NMI to be injected from hypervisor for Secure AVIC
      x86/apic: Read and write LVT* APIC registers from HV for SAVIC guests
      x86/apic: Handle EOI writes for Secure AVIC guests
      x86/apic: Add kexec support for Secure AVIC
      x86/apic: Enable Secure AVIC in the control MSR
      x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests
      x86/sev: Indicate the SEV-SNP guest supports Secure AVIC

Thomas Gleixner (1):
      x86/apic: Make the ISR clearing sane

Tom Lendacky (1):
      x86/startup/sev: Document the CPUID flow in the boot #VC handler

 arch/x86/Kbuild                            |   2 +
 arch/x86/Kconfig                           |  13 +
 arch/x86/Makefile                          |   1 -
 arch/x86/boot/compressed/Makefile          |   2 +-
 arch/x86/boot/compressed/misc.c            |   2 +
 arch/x86/boot/compressed/sev-handle-vc.c   |   3 +
 arch/x86/boot/compressed/sev.c             | 132 +++------
 arch/x86/boot/cpuflags.c                   |  13 -
 arch/x86/boot/startup/Makefile             |  22 ++
 arch/x86/boot/startup/exports.h            |  14 +
 arch/x86/boot/startup/gdt_idt.c            |   4 +-
 arch/x86/boot/startup/map_kernel.c         |   4 +-
 arch/x86/boot/startup/sev-shared.c         | 327 +++++++---------------
 arch/x86/boot/startup/sev-startup.c        | 210 +++-----------
 arch/x86/boot/startup/sme.c                |  30 +-
 arch/x86/coco/core.c                       |   3 +
 arch/x86/coco/sev/Makefile                 |   8 +-
 arch/x86/coco/sev/core.c                   | 276 ++++++++++++++++---
 arch/x86/coco/sev/{sev-nmi.c => noinstr.c} |  74 +++++
 arch/x86/coco/sev/vc-handle.c              |  22 +-
 arch/x86/coco/sev/vc-shared.c              | 143 +++++++++-
 arch/x86/include/asm/apic.h                |  11 +
 arch/x86/include/asm/apicdef.h             |   2 +
 arch/x86/include/asm/boot.h                |   2 +
 arch/x86/include/asm/init.h                |   6 -
 arch/x86/include/asm/msr-index.h           |   9 +-
 arch/x86/include/asm/setup.h               |   1 +
 arch/x86/include/asm/sev-common.h          |   1 +
 arch/x86/include/asm/sev-internal.h        |  28 +-
 arch/x86/include/asm/sev.h                 |  41 ++-
 arch/x86/include/uapi/asm/svm.h            |   4 +
 arch/x86/kernel/apic/Makefile              |   1 +
 arch/x86/kernel/apic/apic.c                |  85 +++---
 arch/x86/kernel/apic/vector.c              |  28 +-
 arch/x86/kernel/apic/x2apic_savic.c        | 428 +++++++++++++++++++++++++++++
 arch/x86/kernel/head64.c                   |   5 +-
 arch/x86/kernel/head_32.S                  |   5 +-
 arch/x86/kernel/head_64.S                  |  10 +-
 arch/x86/kernel/vmlinux.lds.S              |   9 +-
 arch/x86/mm/mem_encrypt_amd.c              |   6 -
 arch/x86/mm/mem_encrypt_boot.S             |   6 +-
 arch/x86/platform/pvh/head.S               |   2 +-
 arch/x86/tools/relocs.c                    |   8 +-
 arch/x86/virt/svm/sev.c                    |   7 +-
 drivers/crypto/ccp/Makefile                |   3 +-
 drivers/crypto/ccp/psp-dev.c               |  20 ++
 drivers/crypto/ccp/psp-dev.h               |   8 +-
 drivers/crypto/ccp/sev-dev.c               | 182 ++++++++++++
 drivers/crypto/ccp/sev-dev.h               |   3 +
 drivers/crypto/ccp/sfs.c                   | 311 +++++++++++++++++++++
 drivers/crypto/ccp/sfs.h                   |  47 ++++
 drivers/firmware/efi/libstub/x86-stub.c    |   4 +-
 include/linux/cc_platform.h                |   8 +
 include/linux/psp-platform-access.h        |   2 +
 include/uapi/linux/psp-sfs.h               |  87 ++++++
 tools/objtool/arch/x86/decode.c            |  12 +
 tools/objtool/builtin-check.c              |   2 +
 tools/objtool/check.c                      |  48 +++-
 tools/objtool/include/objtool/arch.h       |   1 +
 tools/objtool/include/objtool/builtin.h    |   1 +
 tools/objtool/noreturns.h                  |   1 -
 61 files changed, 2042 insertions(+), 708 deletions(-)
 create mode 100644 arch/x86/boot/startup/exports.h
 rename arch/x86/coco/sev/{sev-nmi.c => noinstr.c} (61%)
 create mode 100644 arch/x86/kernel/apic/x2apic_savic.c
 create mode 100644 drivers/crypto/ccp/sfs.c
 create mode 100644 drivers/crypto/ccp/sfs.h
 create mode 100644 include/uapi/linux/psp-sfs.h


-- 
Regards/Gruss,
    Boris.

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