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Message-Id: <93704e82-ea7d-45ea-8527-8ce92108eccc@app.fastmail.com>
Date: Fri, 26 Sep 2025 13:09:37 +0200
From: "Arnd Bergmann" <arnd@...db.de>
To: "Manikanta Guntupalli" <manikanta.guntupalli@....com>, git@....com,
 "Michal Simek" <michal.simek@....com>,
 "Alexandre Belloni" <alexandre.belloni@...tlin.com>,
 "Frank Li" <Frank.Li@....com>, "Rob Herring" <robh@...nel.org>,
 krzk+dt@...nel.org, "Conor Dooley" <conor+dt@...nel.org>,
 Przemysław Gaj <pgaj@...ence.com>,
 "Wolfram Sang" <wsa+renesas@...g-engineering.com>,
 tommaso.merciai.xr@...renesas.com, quic_msavaliy@...cinc.com,
 Shyam-sundar.S-k@....com, "Sakari Ailus" <sakari.ailus@...ux.intel.com>,
 "'billy_tsai@...eedtech.com'" <billy_tsai@...eedtech.com>,
 "Kees Cook" <kees@...nel.org>, "Gustavo A. R. Silva" <gustavoars@...nel.org>,
 "Jarkko Nikula" <jarkko.nikula@...ux.intel.com>,
 "Jorge Marques" <jorge.marques@...log.com>,
 "linux-i3c@...ts.infradead.org" <linux-i3c@...ts.infradead.org>,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 Linux-Arch <linux-arch@...r.kernel.org>, linux-hardening@...r.kernel.org
Cc: radhey.shyam.pandey@....com, srinivas.goud@....com,
 shubhrajyoti.datta@....com, manion05gk@...il.com
Subject: Re: [PATCH V8 4/5] i3c: master: Add endianness support for i3c_readl_fifo()
 and i3c_writel_fifo()

On Fri, Sep 26, 2025, at 12:53, Manikanta Guntupalli wrote:
> Add endianness handling to the FIFO access helpers i3c_readl_fifo() and
> i3c_writel_fifo(). This ensures correct data transfers on platforms where
> the FIFO registers are expected to be accessed in either big-endian or
> little-endian format.
>
> Update the Synopsys, Cadence, and Renesas I3C master controller drivers to
> pass the appropriate endianness argument to these helpers.
>
> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@....com>
> Reviewed-by: Frank Li <Frank.Li@....com>

I don't think this is a good interface, based on our discussion
so far, and I had hoped you'd change it the way I had suggested
with a separate function for the xi3c driver, so normal drivers
don't have to worry about the AMD specific quirk.

I think this should also avoid mentioning "endianess" in the
changelog and in the code itself, since that would likely
confuse readers into thinking (as I did in my earlier replies)
that this is related to using big-endian kernels.

i3c_readl_fifo()/i3c_writel_fifo() are already portable and
handle endianess correctly by using the readsl()/writesl()
functions.

    Arnd

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