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Message-ID:
 <SJ0PR12MB56762F9D281C3667A5C60087A01EA@SJ0PR12MB5676.namprd12.prod.outlook.com>
Date: Fri, 26 Sep 2025 16:35:25 +0000
From: Besar Wicaksono <bwicaksono@...dia.com>
To: Robin Murphy <robin.murphy@....com>, "will@...nel.org" <will@...nel.org>,
	"ilkka@...amperecomputing.com" <ilkka@...amperecomputing.com>
CC: "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-tegra@...r.kernel.org"
	<linux-tegra@...r.kernel.org>, "suzuki.poulose@....com"
	<suzuki.poulose@....com>, "mark.rutland@....com" <mark.rutland@....com>,
	Thierry Reding <treding@...dia.com>, Jon Hunter <jonathanh@...dia.com>,
	Vikram Sethi <vsethi@...dia.com>, Rich Wiley <rwiley@...dia.com>, Shanker
 Donthineni <sdonthineni@...dia.com>
Subject: RE: [PATCH v2 5/5] perf/arm_cspmu: nvidia: Add pmevfiltr2 support



> -----Original Message-----
> From: Robin Murphy <robin.murphy@....com>
> Sent: Friday, September 26, 2025 5:32 AM
> To: Besar Wicaksono <bwicaksono@...dia.com>; will@...nel.org;
> ilkka@...amperecomputing.com
> Cc: linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org; linux-
> tegra@...r.kernel.org; suzuki.poulose@....com; mark.rutland@....com;
> Thierry Reding <treding@...dia.com>; Jon Hunter <jonathanh@...dia.com>;
> Vikram Sethi <vsethi@...dia.com>; Rich Wiley <rwiley@...dia.com>; Shanker
> Donthineni <sdonthineni@...dia.com>
> Subject: Re: [PATCH v2 5/5] perf/arm_cspmu: nvidia: Add pmevfiltr2 support
> 
> External email: Use caution opening links or attachments
> 
> 
> On 2025-09-23 1:18 am, Besar Wicaksono wrote:
> > Support NVIDIA PMU that utilizes the optional event filter2 register.
> >
> > Signed-off-by: Besar Wicaksono <bwicaksono@...dia.com>
> > ---
> >   drivers/perf/arm_cspmu/nvidia_cspmu.c | 176 +++++++++++++++++++---
> ----
> >   1 file changed, 133 insertions(+), 43 deletions(-)
> >
> > diff --git a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > index ac91dc46501d..e06a06d3407b 100644
> > --- a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > +++ b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > @@ -40,10 +40,21 @@
> >
> >   struct nv_cspmu_ctx {
> >       const char *name;
> > -     u32 filter_mask;
> > -     u32 filter_default_val;
> > +
> >       struct attribute **event_attr;
> >       struct attribute **format_attr;
> > +
> > +     u32 filter_mask;
> > +     u32 filter_default_val;
> > +     u32 filter2_mask;
> > +     u32 filter2_default_val;
> > +
> > +     u32 (*get_filter)(const struct perf_event *event);
> > +     u32 (*get_filter2)(const struct perf_event *event);
> 
> Callbacks for this seem like complete overkill - you already know
> whether a given implementation cares about each filter via
> .filter{,2}_mask being nonzero, so unless you intend to have wildly
> different event encodings across implementations, a simple conditional
> extension of the existing nv_cspmu_event_filter() logic should be all
> you need.
> 

Indeed, this is the reason. All the new PMUs we are planning to support
have unique requirements on the filter configuration.

Regards,
Besar



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