linux-kernel - [PATCH] clk: qcom: glymur: Fix the sec and tert phy pipe clock halt check

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Message-Id: <20250928-clk-qcom-glymur-gcc-fix-sec-tert-pipe-clk-v1-1-55e323cc98cf@linaro.org>
Date: Sun, 28 Sep 2025 16:14:09 +0300
From: Abel Vesa <abel.vesa@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>, 
 Michael Turquette <mturquette@...libre.com>, 
 Stephen Boyd <sboyd@...nel.org>, 
 Konrad Dybcio <konrad.dybcio@....qualcomm.com>, 
 Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>, 
 Taniya Das <taniya.das@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, 
 linux-kernel@...r.kernel.org, Abel Vesa <abel.vesa@...aro.org>
Subject: [PATCH] clk: qcom: glymur: Fix the sec and tert phy pipe clock
 halt check

On Glymur platform, halt checking on gcc_usb3_sec_phy_pipe_clk and
gcc_usb3_tert_phy_pipe_clk on enable reports them as being stuck as off,
but since the gcc_usb3_prim_phy_pipe_clk clock halt check flag is marked
as delay, means it probably it should be the same for sec and tert as
well. So replace the voted flag with the delay one for these two clocks.

Fixes: efe504300a17 ("clk: qcom: gcc: Add support for Global Clock Controller")
Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
---
 drivers/clk/qcom/gcc-glymur.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/gcc-glymur.c b/drivers/clk/qcom/gcc-glymur.c
index 62059120f9720bbac03852c0368f4de3038a559c..f00d72bb4ac4d60032e5332e6bcc439f890e5082 100644
--- a/drivers/clk/qcom/gcc-glymur.c
+++ b/drivers/clk/qcom/gcc-glymur.c
@@ -6816,7 +6816,7 @@ static struct clk_branch gcc_usb3_sec_phy_com_aux_clk = {
 
 static struct clk_branch gcc_usb3_sec_phy_pipe_clk = {
 	.halt_reg = 0xe2078,
-	.halt_check = BRANCH_HALT_VOTED,
+	.halt_check = BRANCH_HALT_DELAY,
 	.hwcg_reg = 0xe2078,
 	.hwcg_bit = 1,
 	.clkr = {
@@ -6872,7 +6872,7 @@ static struct clk_branch gcc_usb3_tert_phy_com_aux_clk = {
 
 static struct clk_branch gcc_usb3_tert_phy_pipe_clk = {
 	.halt_reg = 0xe1078,
-	.halt_check = BRANCH_HALT_VOTED,
+	.halt_check = BRANCH_HALT_DELAY,
 	.hwcg_reg = 0xe1078,
 	.hwcg_bit = 1,
 	.clkr = {

---
base-commit: 262858079afde6d367ce3db183c74d8a43a0e83f
change-id: 20250928-clk-qcom-glymur-gcc-fix-sec-tert-pipe-clk-6f48511333d0

Best regards,
-- 
Abel Vesa <abel.vesa@...aro.org>