linux-kernel - Re: [PATCH v3 1/2] dt-bindings: npu: Add Arm Ethos-U65/U85

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Message-ID: <aNrVwn1ibQmB/rKJ@lizhi-Precision-Tower-5810>
Date: Mon, 29 Sep 2025 14:53:54 -0400
From: Frank Li <Frank.li@....com>
To: "Rob Herring (Arm)" <robh@...nel.org>
Cc: Tomeu Vizoso <tomeu@...euvizoso.net>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Oded Gabbay <ogabbay@...nel.org>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
	Sumit Semwal <sumit.semwal@...aro.org>,
	Christian König <christian.koenig@....com>,
	Robin Murphy <robin.murphy@....com>,
	Steven Price <steven.price@....com>,
	Daniel Stone <daniel@...ishbar.org>, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
	linux-media@...r.kernel.org, linaro-mm-sig@...ts.linaro.org
Subject: Re: [PATCH v3 1/2] dt-bindings: npu: Add Arm Ethos-U65/U85

On Fri, Sep 26, 2025 at 03:00:48PM -0500, Rob Herring (Arm) wrote:
> Add a binding schema for Arm Ethos-U65/U85 NPU. The Arm Ethos-U NPUs are
> designed for edge AI inference applications.
>
> Signed-off-by: Rob Herring (Arm) <robh@...nel.org>
> ---
>  .../devicetree/bindings/npu/arm,ethos.yaml         | 79 ++++++++++++++++++++++
>  1 file changed, 79 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/npu/arm,ethos.yaml b/Documentation/devicetree/bindings/npu/arm,ethos.yaml
> new file mode 100644
> index 000000000000..716c4997f976
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/npu/arm,ethos.yaml
> @@ -0,0 +1,79 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/npu/arm,ethos.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Arm Ethos U65/U85
> +
> +maintainers:
> +  - Rob Herring <robh@...nel.org>
> +
> +description: >
> +  The Arm Ethos-U NPUs are designed for IoT inference applications. The NPUs
> +  can accelerate 8-bit and 16-bit integer quantized networks:
> +
> +    Transformer networks (U85 only)
> +    Convolutional Neural Networks (CNN)
> +    Recurrent Neural Networks (RNN)
> +
> +  Further documentation is available here:
> +
> +    U65 TRM: https://developer.arm.com/documentation/102023/
> +    U85 TRM: https://developer.arm.com/documentation/102685/
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - enum:
> +              - fsl,imx93-npu
> +          - const: arm,ethos-u65
> +      - items:
> +          - {}

what's means {} here ?, just not allow arm,ethos-u85 alone?

Reviewed-by: Frank Li <Frank.Li@....com>

> +          - const: arm,ethos-u85
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: core
> +      - const: apb
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  sram:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/clock/imx93-clock.h>
> +
> +    npu@...00000 {
> +        compatible = "fsl,imx93-npu", "arm,ethos-u65";
> +        reg = <0x4a900000 0x1000>;
> +        interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
> +        power-domains = <&mlmix>;
> +        clocks = <&clk IMX93_CLK_ML>, <&clk IMX93_CLK_ML_APB>;
> +        clock-names = "core", "apb";
> +        sram = <&sram>;
> +    };
> +...
>
> --
> 2.51.0
>