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Message-ID: <CANAwSgT3jo35xBvkH4GmQcZuZH=D+SRKJ6e9fSBRz45zwuCmYw@mail.gmail.com>
Date: Mon, 29 Sep 2025 13:09:48 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Rob Herring <robh@...nel.org>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>, Krzysztof Wilczyński <kwilczynski@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Thierry Reding <thierry.reding@...il.com>, Jonathan Hunter <jonathanh@...dia.com>,
"open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS" <linux-pci@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>,
"open list:TEGRA ARCHITECTURE SUPPORT" <linux-tegra@...r.kernel.org>, open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 1/5] dt-bindings: PCI: Convert the existing
nvidia,tegra-pcie.txt bindings documentation into a YAML schema
Hi Rob,
Thanks for your review comments
On Fri, 26 Sept 2025 at 19:26, Rob Herring <robh@...nel.org> wrote:
>
> On Fri, Sep 26, 2025 at 2:29 AM Anand Moon <linux.amoon@...il.com> wrote:
> >
> > Convert the legacy text-based binding documentation for
> > nvidia,tegra-pcie into a nvidia,tegra-pcie.yaml YAML schema, following
>
> s/YAML/DT/
>
Ok,
> > the Devicetree Schema format. This improves validation coverage and enables
> > dtbs_check compliance for Tegra PCIe nodes.
>
> Your subject needs some work too. 'existing' and 'bindings
> documentation' are redundant.
>
Here is the simplified version
dt-bindings: PCI: Convert the nvidia,tegra-pcie bindings documentation
into a YAML schema
Convert the existing text-based DT bindings documentation for the
NVIDIA Tegra PCIe host controller to a YAML schema format.
> >
> > Cc: Jon Hunter <jonathanh@...dia.com>
> > Signed-off-by: Anand Moon <linux.amoon@...il.com>
> > ---
> > v1: new patch in this series.
> > ---
> > .../bindings/pci/nvidia,tegra-pcie.yaml | 651 +++++++++++++++++
> > .../bindings/pci/nvidia,tegra20-pcie.txt | 670 ------------------
> > 2 files changed, 651 insertions(+), 670 deletions(-)
> > create mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra-pcie.yaml
> > delete mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
> >
> > diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra-pcie.yaml b/Documentation/devicetree/bindings/pci/nvidia,tegra-pcie.yaml
> > new file mode 100644
> > index 000000000000..dd8cba125b53
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra-pcie.yaml
> > @@ -0,0 +1,651 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pci/nvidia,tegra-pcie.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NVIDIA Tegra PCIe Controller
> > +
> > +maintainers:
> > + - Thierry Reding <thierry.reding@...il.com>
> > + - Jon Hunter <jonathanh@...dia.com>
> > +
> > +description: |
>
> Don't need '|'.
>
Ok
> > + PCIe controller found on NVIDIA Tegra SoCs including Tgra20, Tegra30,
> > + Tegra124, Tegra210, and Tegra186. Supports multiple root ports and
> > + platform-specific clock, reset, and power supply configurations.
>
> I would suggest not listing every SoC here unless the list is not going to grow.
>
Here is the short format.
PCIe controller found on NVIDIA Tegra SoCs which supports multiple
root ports and platform-specific clock, reset, and power supply
configurations.
Ok
> > +
> > +properties:
> > + compatible:
> > + oneOf:
>
> Only 1 entry here, don't need 'oneOf'.
I am observing the following warning if I remove this.
make ARCH=arm64 -j$(nproc) dt_binding_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/pci/nvidia,tegra-pcie.yaml
CHKDT ./Documentation/devicetree/bindings
/media/nvme0/mainline/linux-tegra-6.y-devel/Documentation/devicetree/bindings/pci/nvidia,tegra-pcie.yaml:
properties:compatible: [{'items': [{'enum': ['nvidia,tegra20-pcie',
'nvidia,tegra30-pcie', 'nvidia,tegra124-pcie', 'nvidia,tegra210-pcie',
'nvidia,tegra186-pcie']}]}] is not of type 'object', 'boolean'
from schema $id: http://json-schema.org/draft-07/schema#
/media/nvme0/mainline/linux-tegra-6.y-devel/Documentation/devicetree/bindings/pci/nvidia,tegra-pcie.yaml:
properties:compatible: [{'items': [{'enum': ['nvidia,tegra20-pcie',
'nvidia,tegra30-pcie', 'nvidia,tegra124-pcie', 'nvidia,tegra210-pcie',
'nvidia,tegra186-pcie']}]}] is not of type 'object', 'boolean'
from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
>
> > + - items:
> > + - enum:
> > + - nvidia,tegra20-pcie
> > + - nvidia,tegra30-pcie
> > + - nvidia,tegra124-pcie
> > + - nvidia,tegra210-pcie
> > + - nvidia,tegra186-pcie
> > +
> > + reg:
> > + items:
> > + - description: PADS registers
> > + - description: AFI registers
> > + - description: Configuration space region
> > +
> > + reg-names:
> > + items:
> > + - const: pads
> > + - const: afi
> > + - const: cs
> > +
> > + device_type:
> > + const: pci
>
> Drop. This is covered by pci-host-bridge.yaml.
Ok
>
> > +
> > + interrupts:
> > + items:
> > + - description: Controller interrupt
> > + - description: MSI interrupt
> > +
> > + interrupt-names:
> > + items:
> > + - const: intr
> > + - const: msi
> > +
> > + clocks:
> > + oneOf:
> > + - items:
> > + - description: PCIe clock
> > + - description: AFI clock
> > + - description: PLL_E clock
>
> Drop this list and add 'minItems: 3'
Ok
>
> > + - items:
> > + - description: PCIe clock
> > + - description: AFI clock
> > + - description: PLL_E clock
> > + - description: CML clock
> > +
> > + clock-names:
> > + oneOf:
> > + - items:
> > + - const: pex
> > + - const: afi
> > + - const: pll_e
>
> Same here.
Ok these are dumpicate will remove this.
>
> > + - items:
> > + - const: pex
> > + - const: afi
> > + - const: pll_e
> > + - const: cml
> > +
> > + resets:
> > + items:
> > + - description: PCIe reset
> > + - description: AFI reset
> > + - description: PCIe X reset
> > +
> > + reset-names:
> > + items:
> > + - const: pex
> > + - const: afi
> > + - const: pcie_x
> > +
> > + power-domains:
> > + maxItems: 1
> > + description: |
> > + A phandle to the node that controls power to the respective PCIe
> > + controller and a specifier name for the PCIe controller.
>
> Don't need generic descriptions of common properties. Drop.
>
Ok
> > +
> > + interconnects:
> > + minItems: 1
> > + maxItems: 2
> > +
> > + interconnect-names:
> > + minItems: 1
> > + maxItems: 2
> > + description:
> > + Should include name of the interconnect path for each interconnect
> > + entry. Consult TRM documentation for information about available
> > + memory clients, see DMA CONTROLLER and MEMORY WRITE sections.
>
> You have to document what the names are.
items:
- const: dma-mem
- const: write
Ok.
>
> > +
> > + pinctrl-names:
> > + items:
> > + - const: default
> > + - const: idle
> > +
> > + pinctrl-0:
> > + $ref: /schemas/types.yaml#/definitions/phandle
>
> This already has a type. Just 'pinctrl-0: true' is enough.
>
Ok I will drop pinctrl
> > +
> > + pinctrl-1:
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > +
> > + nvidia,num-lanes:
> > + description: Number of PCIe lanes used
> > + $ref: /schemas/types.yaml#/definitions/uint32
>
> The examples show this in child nodes.
yes it patternProperties example I missed this.
patternProperties:
"^pci@[0-9a-f]+$":
type: object
properties:
reg:
maxItems: 1
nvidia,num-lanes:
description: Number of PCIe lanes used
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
unevaluatedProperties: false
>
> > +
> > +allOf:
> > + - $ref: /schemas/pci/pci-host-bridge.yaml#
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - nvidia,tegra20-pcie
> > + - nvidia,tegra186-pcie
> > + then:
> > + properties:
> > + clocks:
> > + minItems: 3
>
> 3 is already the min, so drop.
>
> > + maxItems: 3
> > + clock-names:
> > + items:
> > + - const: pex
> > + - const: afi
> > + - const: pll_e
>
> Names are already defined, so just 'maxItems: 3'
>
> Same comments apply to the rest...
>
Ok correct.
> > + resets:
> > + minItems: 3
> > + maxItems: 3
> > + reset-names:
> > + items:
> > + - const: pex
> > + - const: afi
> > + - const: pcie_x
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - nvidia,tegra30-pcie
> > + - nvidia,tegra124-pcie
> > + - nvidia,tegra210-pcie
> > + then:
> > + properties:
> > + clocks:
> > + minItems: 4
> > + maxItems: 4
>
> Just 'minItems' here.
>
Ok,
> > + clock-names:
> > + items:
> > + - const: pex
> > + - const: afi
> > + - const: pll_e
> > + - const: cml
>
> And here...
>
> > + resets:
> > + minItems: 3
> > + maxItems: 3
> > + reset-names:
> > + items:
> > + - const: pex
> > + - const: afi
> > + - const: pcie_x
> > +
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - nvidia,tegra20-pcie
> > + - nvidia,tegra30-pcie
> > + - nvidia,tegra186-pcie
> > + then:
> > + required:
> > + - power-domains
> > +
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - nvidia,tegra186-pcie
> > + then:
> > + required:
> > + - interconnects
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - nvidia,tegra210-pcie
> > + then:
> > + required:
> > + - pinctrl-names
> > + - pinctrl-0
> > + - pinctrl-1
> > +
> > +unevaluatedProperties: false
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - clocks
> > + - clock-names
> > + - resets
> > + - reset-names
> > + - interrupts
> > + - interrupt-map
> > + - interrupt-map-mask
> > + - ranges
>
> Already required by pci-host-bridge.yaml.
>
> > + - bus-range
>
Ok
> Generally, bus-range is only required when there's some h/w issue.
>
> > + - device_type
>
> Already required by pci-host-bridge.yaml.
Ok
>
> > + - interconnects
> > + - pinctrl-names
>
> Above you said this was conditional.
>
Ok, I will drop this.
> > + - nvidia,num-lanes
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > +
> > + bus {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + pcie@...03000 {
> > + compatible = "nvidia,tegra20-pcie";
> > + device_type = "pci";
> > + reg = <0x80003000 0x00000800>,
> > + <0x80003800 0x00000200>,
> > + <0x90000000 0x10000000>;
> > + reg-names = "pads", "afi", "cs";
> > + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "intr", "msi";
> > + interrupt-parent = <&intc>;
> > +
> > + #interrupt-cells = <1>;
> > + interrupt-map-mask = <0 0 0 0>;
> > + interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + bus-range = <0x00 0xff>;
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > +
> > + ranges = <0x02000000 0 0x80000000 0x80000000 0 0x00001000>,
> > + <0x02000000 0 0x80001000 0x80001000 0 0x00001000>,
> > + <0x01000000 0 0 0x82000000 0 0x00010000>,
> > + <0x02000000 0 0xa0000000 0xa0000000 0 0x08000000>,
> > + <0x42000000 0 0xa8000000 0xa8000000 0 0x18000000>;
> > +
> > + clocks = <&tegra_car 70>,
> > + <&tegra_car 72>,
> > + <&tegra_car 118>;
> > + clock-names = "pex", "afi", "pll_e";
> > + resets = <&tegra_car 70>,
> > + <&tegra_car 72>,
> > + <&tegra_car 74>;
> > + reset-names = "pex", "afi", "pcie_x";
> > + power-domains = <&pd_core>;
> > + operating-points-v2 = <&pcie_dvfs_opp_table>;
> > +
> > + status = "disabled";
>
> Examples must be enabled.
Ok
>
> > +
> > + pci@1,0 {
> > + device_type = "pci";
> > + assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>;
> > + reg = <0x000800 0 0 0 0>;
> > + bus-range = <0x00 0xff>;
> > + status = "disabled";
> > +
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + ranges;
> > +
> > + nvidia,num-lanes = <2>;
>
> This doesn't match the schema.
I will try to validate it as a child node with patternProperties.
>
> > + };
> > +
> > + pci@2,0 {
> > + device_type = "pci";
> > + assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>;
> > + reg = <0x001000 0 0 0 0>;
> > + bus-range = <0x00 0xff>;
> > + status = "disabled";
> > +
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + ranges;
> > +
> > + nvidia,num-lanes = <2>;
> > + };
> > + };
> > + };
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > + #include <dt-bindings/interrupt-controller/irq.h>
> > +
> > + bus {
>
> I don't think we need 4 examples.
Ok nvidia,tegra20-pcie and nvidia,tegra210-pcie should be valid
>
> Rob
Thanks
-Anand
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