linux-kernel - [PATCH 0/4] MediaTek Runtime Power Management Clocks for PLL

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Message-Id: <20250929-mtk-pll-rpm-v1-0-49541777878d@collabora.com>
Date: Mon, 29 Sep 2025 14:13:19 +0200
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: Michael Turquette <mturquette@...libre.com>, 
 Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Matthias Brugger <matthias.bgg@...il.com>, 
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, 
 Guangjie Song <guangjie.song@...iatek.com>, 
 Laura Nao <laura.nao@...labora.com>, 
 Nícolas F. R. A. Prado <nfraprado@...labora.com>, 
 Yassine Oudjana <y.oudjana@...tonmail.com>
Cc: kernel@...labora.com, 
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, 
 linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
 linux-mediatek@...ts.infradead.org, 
 Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Subject: [PATCH 0/4] MediaTek Runtime Power Management Clocks for PLL

This series refactors all users of mtk-pll, just so we can enable
runtime power management. This will then allow us to have clock
controllers that depend on other clocks to be on for their control
registers to be functional.

The final use is to add this sort of relationship to the MT8196 mfgpll
clocks, which all need the CLK_TOP_MFG_EB to be on before their control
registers can even be read.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
---
Nicolas Frattaroli (4):
      dt-bindings: clock: mediatek: Add clocks for MT8196 mfgpll
      clk: mediatek: Refactor pll registration to pass device
      clk: mediatek: Pass device to clk_hw_register for PLLs
      clk: mediatek: Add rpm clocks to clk-mt8196-mfg

 .../bindings/clock/mediatek,mt8196-sys-clock.yaml  |  28 ++++++
 drivers/clk/mediatek/clk-mt2701.c                  |   2 +-
 drivers/clk/mediatek/clk-mt2712-apmixedsys.c       |   2 +-
 drivers/clk/mediatek/clk-mt6735-apmixedsys.c       |   4 +-
 drivers/clk/mediatek/clk-mt6765.c                  |   2 +-
 drivers/clk/mediatek/clk-mt6779.c                  |   2 +-
 drivers/clk/mediatek/clk-mt6797.c                  |   2 +-
 drivers/clk/mediatek/clk-mt7622-apmixedsys.c       |   2 +-
 drivers/clk/mediatek/clk-mt7629.c                  |   2 +-
 drivers/clk/mediatek/clk-mt7981-apmixed.c          |   2 +-
 drivers/clk/mediatek/clk-mt7986-apmixed.c          |   2 +-
 drivers/clk/mediatek/clk-mt7988-apmixed.c          |   2 +-
 drivers/clk/mediatek/clk-mt8135-apmixedsys.c       |   3 +-
 drivers/clk/mediatek/clk-mt8167-apmixedsys.c       |   2 +-
 drivers/clk/mediatek/clk-mt8183-apmixedsys.c       |   2 +-
 drivers/clk/mediatek/clk-mt8188-apmixedsys.c       |   2 +-
 drivers/clk/mediatek/clk-mt8195-apusys_pll.c       |   3 +-
 drivers/clk/mediatek/clk-mt8196-apmixedsys.c       |   3 +-
 drivers/clk/mediatek/clk-mt8196-mcu.c              |   2 +-
 drivers/clk/mediatek/clk-mt8196-mfg.c              | 104 +++++++++++++++++----
 drivers/clk/mediatek/clk-mt8196-vlpckgen.c         |   2 +-
 drivers/clk/mediatek/clk-mt8365-apmixedsys.c       |   2 +-
 drivers/clk/mediatek/clk-mt8516-apmixedsys.c       |   2 +-
 drivers/clk/mediatek/clk-pll.c                     |  16 ++--
 drivers/clk/mediatek/clk-pll.h                     |  12 ++-
 drivers/clk/mediatek/clk-pllfh.c                   |   2 +-
 26 files changed, 157 insertions(+), 52 deletions(-)
---
base-commit: 905612298ef4f5fa9f85fbc6825af224f40af70f
change-id: 20250929-mtk-pll-rpm-bf28192dd016

Best regards,
-- 
Nicolas Frattaroli <nicolas.frattaroli@...labora.com>