linux-kernel - Re: [PATCH v3 11/16] KVM: TDX: Add x86 ops for external spt cache

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <42ecbeadd2d8916229f1936dad58ce71323a5525.camel@intel.com>
Date: Tue, 30 Sep 2025 17:54:34 +0000
From: "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>
To: "Zhao, Yan Y" <yan.y.zhao@...el.com>
CC: "Gao, Chao" <chao.gao@...el.com>, "seanjc@...gle.com" <seanjc@...gle.com>,
	"Huang, Kai" <kai.huang@...el.com>, "kas@...nel.org" <kas@...nel.org>,
	"Annapurve, Vishal" <vannapurve@...gle.com>, "bp@...en8.de" <bp@...en8.de>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"mingo@...hat.com" <mingo@...hat.com>, "dave.hansen@...ux.intel.com"
	<dave.hansen@...ux.intel.com>, "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
	"linux-coco@...ts.linux.dev" <linux-coco@...ts.linux.dev>, "Yamahata, Isaku"
	<isaku.yamahata@...el.com>, "pbonzini@...hat.com" <pbonzini@...hat.com>,
	"tglx@...utronix.de" <tglx@...utronix.de>, "x86@...nel.org" <x86@...nel.org>
Subject: Re: [PATCH v3 11/16] KVM: TDX: Add x86 ops for external spt cache

On Tue, 2025-09-30 at 09:02 +0800, Yan Zhao wrote:
> On Thu, Sep 18, 2025 at 04:22:19PM -0700, Rick Edgecombe wrote:
> >   	if (kvm_has_mirrored_tdp(vcpu->kvm)) {
> > -		r = kvm_mmu_topup_memory_cache(&vcpu->arch.mmu_external_spt_cache,
> > -					       PT64_ROOT_MAX_LEVEL);
> > +		r = kvm_x86_call(topup_external_fault_cache)(vcpu);
> Another concern about the topup op is that it entirely hides the page count from
> KVM mmu core and assumes the page table level KVM requests is always
> PT64_ROOT_MAX_LEVEL.

That's a good point. Core MMU *does* care about the number of times it calls
alloc_external_fault_cache(). It should take a count with respect to that, and
internally TDX code can adjust it up to include DPAMT pages if needed.

> 
> This assumption will not hold true for split cache for huge pages, where only
> a single level is needed and memory for sp, sp->spt, and sp->external_spt does
> not need to be allocated from the split cache. [1].