linux-kernel - Re: [Patch v4 03/17] x86/fpu/xstate: Add xsaves

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Message-ID: <146dd8a2-b1e4-43e2-8bd6-93f18eea4402@linux.intel.com>
Date: Tue, 30 Sep 2025 10:44:27 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Dave Hansen <dave.hansen@...el.com>, Peter Zijlstra
 <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
 Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, Thomas Gleixner <tglx@...utronix.de>,
 Dave Hansen <dave.hansen@...ux.intel.com>, Ian Rogers <irogers@...gle.com>,
 Adrian Hunter <adrian.hunter@...el.com>, Jiri Olsa <jolsa@...nel.org>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Kan Liang <kan.liang@...ux.intel.com>, Andi Kleen <ak@...ux.intel.com>,
 Eranian Stephane <eranian@...gle.com>
Cc: Mark Rutland <mark.rutland@....com>, broonie@...nel.org,
 Ravi Bangoria <ravi.bangoria@....com>, linux-kernel@...r.kernel.org,
 linux-perf-users@...r.kernel.org, Dapeng Mi <dapeng1.mi@...el.com>
Subject: Re: [Patch v4 03/17] x86/fpu/xstate: Add xsaves_nmi


On 9/30/2025 3:01 AM, Dave Hansen wrote:
> On 9/27/25 22:31, Mi, Dapeng wrote:
>>> Also, what supervisor components are involved here? Aren't we just
>>> talking about [XYZ]MM's?
>> Besides the SIMD registers [XYZ]MM, the CET_USR (only SSP) and APX eGPRs
>> would be supported as well.
> We should think long and hard about whether to use XSAVE for the CET
> SSP. I'm not convinced it's worth it.

Yeah, It's indeed inefficient to read a ONLY SSP register by using xsaves
instruction. Do you think if it's safe enough to directly read IA32_PL3_SSP
MSR by using rdmsr instruction?

IMO, It seems good enough to read IA32_PL3_SSP directly with rdmsr in NMI
context since we just need to know the real value in IA32_PL3_SSP when NMI
hits. Thanks.