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Message-ID: <b4a85ca93590147c3f5943f5b0183765150c81cc.camel@gmail.com>
Date: Tue, 30 Sep 2025 13:36:46 +0100
From: Nuno Sá <noname.nuno@...il.com>
To: Antoniu Miclaus <antoniu.miclaus@...log.com>, jic23@...nel.org,
robh@...nel.org, conor+dt@...nel.org, linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 2/6] iio: adc: ad4080: prepare driver for multi-part
support
On Tue, 2025-09-30 at 10:32 +0000, Antoniu Miclaus wrote:
> Refactor the ad4080 driver to support multiple ADC variants with
> different resolution bits and LVDS CNV clock count maximums.
>
> Changes:
> - Add lvds_cnv_clk_cnt_max field to chip_info structure
> - Create AD4080_CHANNEL_DEFINE macro for variable resolution/storage bits
> - Make LVDS CNV clock count configurable per chip variant
> - Use chip_info->product_id for chip identification comparison
>
> This prepares the infrastructure for adding support for additional
> ADC parts with different specifications while maintaining backward
> compatibility with existing AD4080 functionality.
>
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@...log.com>
> ---
Reviewed-by: Nuno Sá <nuno.sa@...log.com>
> changes in v2:
> - allign all the \ to the left in the channel definition.
> drivers/iio/adc/ad4080.c | 42 ++++++++++++++++++++++------------------
> 1 file changed, 23 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
> index b80560aebe2d..fa15b8f63b8a 100644
> --- a/drivers/iio/adc/ad4080.c
> +++ b/drivers/iio/adc/ad4080.c
> @@ -167,6 +167,7 @@ struct ad4080_chip_info {
> const unsigned int (*scale_table)[2];
> const struct iio_chan_spec *channels;
> unsigned int num_channels;
> + unsigned int lvds_cnv_clk_cnt_max;
> };
>
> struct ad4080_state {
> @@ -414,23 +415,25 @@ static struct iio_chan_spec_ext_info ad4080_ext_info[] =
> {
> { }
> };
>
> -static const struct iio_chan_spec ad4080_channel = {
> - .type = IIO_VOLTAGE,
> - .indexed = 1,
> - .channel = 0,
> - .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE),
> - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) |
> - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
> - .info_mask_shared_by_all_available =
> - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
> - .ext_info = ad4080_ext_info,
> - .scan_index = 0,
> - .scan_type = {
> - .sign = 's',
> - .realbits = 20,
> - .storagebits = 32,
> - },
> -};
> +#define AD4080_CHANNEL_DEFINE(bits, storage) { \
> + .type = IIO_VOLTAGE, \
> + .indexed = 1, \
> + .channel = 0, \
> + .info_mask_separate =
> BIT(IIO_CHAN_INFO_SCALE), \
> + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
> + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
> + .info_mask_shared_by_all_available = \
> + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
> + .ext_info = ad4080_ext_info, \
> + .scan_index = 0, \
> + .scan_type = { \
> + .sign = 's', \
> + .realbits = (bits), \
> + .storagebits = (storage), \
> + }, \
> +}
> +
> +static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20,
> 32);
>
> static const struct ad4080_chip_info ad4080_chip_info = {
> .name = "ad4080",
> @@ -439,6 +442,7 @@ static const struct ad4080_chip_info ad4080_chip_info = {
> .num_scales = ARRAY_SIZE(ad4080_scale_table),
> .num_channels = 1,
> .channels = &ad4080_channel,
> + .lvds_cnv_clk_cnt_max = AD4080_LVDS_CNV_CLK_CNT_MAX,
> };
>
> static int ad4080_setup(struct iio_dev *indio_dev)
> @@ -463,7 +467,7 @@ static int ad4080_setup(struct iio_dev *indio_dev)
> return ret;
>
> id = get_unaligned_le16(&id);
> - if (id != AD4080_CHIP_ID)
> + if (id != st->info->product_id)
> dev_info(dev, "Unrecognized CHIP_ID 0x%X\n", id);
>
> ret = regmap_set_bits(st->regmap, AD4080_REG_GPIO_CONFIG_A,
> @@ -489,7 +493,7 @@ static int ad4080_setup(struct iio_dev *indio_dev)
> AD4080_REG_ADC_DATA_INTF_CONFIG_B,
>
> AD4080_ADC_DATA_INTF_CONFIG_B_LVDS_CNV_CLK_CNT_MSK,
>
> FIELD_PREP(AD4080_ADC_DATA_INTF_CONFIG_B_LVDS_CNV_CLK_CNT_MSK,
> - AD4080_LVDS_CNV_CLK_CNT_MAX));
> + st->info->lvds_cnv_clk_cnt_max));
> if (ret)
> return ret;
>
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