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Message-ID: <68e10834-0c1a-4cbe-be0b-76e17f8341e0@broadcom.com>
Date: Wed, 1 Oct 2025 08:28:33 -0700
From: Florian Fainelli <florian.fainelli@...adcom.com>
To: Peng Fan <peng.fan@....nxp.com>, Kamal Dasu <kamal.dasu@...adcom.com>
Cc: bcm-kernel-feedback-list@...adcom.com, andersson@...nel.org,
 baolin.wang@...ux.alibaba.com, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, linux-remoteproc@...r.kernel.org,
 devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: hwlock: Adding brcmstb-hwspinlock
 support



On 9/30/2025 7:58 PM, Peng Fan wrote:
> On Mon, Sep 29, 2025 at 04:06:24PM -0400, Kamal Dasu wrote:
>> Adding brcmstb-hwspinlock bindings.
>>
>> Signed-off-by: Kamal Dasu <kamal.dasu@...adcom.com>
>> ---
>> .../hwlock/brcm,brcmstb-hwspinlock.yaml       | 36 +++++++++++++++++++
>> 1 file changed, 36 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/hwlock/brcm,brcmstb-hwspinlock.yaml
>>
>> +  - |
>> +    hwlock@...4038 {
>> +        compatible = "brcm,brcmstb-hwspinlock";
>> +        reg = <0x8404038 0x40>;
> 
> Just have a question:
> the base is not 64KB aligned, so just want to know is this module part of
> the other ip block?

The alignment is relevant to determine whether this is part of a larger 
IP block or not, though I am not sure why you use 64KB as a criteria. 
Our HW rules are to match the highest OS available page size for the 
systems, for us it used to be 4KB and is now 16KB alignment.

The block is part of a "sundry" IP which has lots of controls that did 
not belong anywhere else, for better or for worse (pin/mux controls, SoC 
identification, drive strength, reset controls, and other misc bits).
-- 
Florian


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