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Message-ID: <20251001174205.71a08017@bootlin.com>
Date: Wed, 1 Oct 2025 17:42:05 +0200
From: Herve Codina <herve.codina@...tlin.com>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Thomas Gleixner <tglx@...utronix.de>, Wolfram Sang
<wsa+renesas@...g-engineering.com>, Hoan Tran
<hoan@...amperecomputing.com>, Bartosz Golaszewski <brgl@...ev.pl>, Rob
Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor
Dooley <conor+dt@...nel.org>, Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>, Saravana Kannan
<saravanak@...gle.com>, Serge Semin <fancer.lancer@...il.com>, Phil
Edworthy <phil.edworthy@...esas.com>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org, Pascal Eberhard
<pascal.eberhard@...com>, Miquel Raynal <miquel.raynal@...tlin.com>, Thomas
Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v4 7/8] soc: renesas: Add support for Renesas RZ/N1 GPIO
Interrupt Multiplexer
Hi Linus,
On Wed, 1 Oct 2025 13:08:57 +0200
Linus Walleij <linus.walleij@...aro.org> wrote:
> Hi Herve,
>
> thanks for your patch!
>
> On Mon, Sep 22, 2025 at 5:27 PM Herve Codina (Schneider Electric)
> <herve.codina@...tlin.com> wrote:
>
> > On the Renesas RZ/N1 SoC, GPIOs can generate interruptions. Those
> > interruption lines are multiplexed by the GPIO Interrupt Multiplexer in
> > order to map 32 * 3 GPIO interrupt lines to 8 GIC interrupt lines.
> >
> > The GPIO interrupt multiplexer IP does nothing but select 8 GPIO
> > IRQ lines out of the 96 available to wire them to the GIC input lines.
> >
> > Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@...tlin.com>
>
> This looks like some complicated code to reimplement hierarchical
> irq domains.
>
> Can't you just select IRQ_DOMAIN_HIERARCHY and let
> the existing infrastructure in GPIOLIB_IRQCHIP handle
> this?
>
> This kind of remapping and handling is exactly what the
> .child_to_parent_hwirq() callback in struct gpio_irq_chip
> is for. This function can fail if you run out if IRQ lines.
>
> Inspect drivers/gpio/Kconfig driver that select
> IRQ_DOMAIN_HIERARCHY for examples of how to
> do this.
>
> Even if your GPIO driver is not using GPIOLIB_IRQCHIP (in that
> case: why not?) I think you still need to use IRQ_DOMAIN_HIERARCHY
> for this.
>
I don't see how IRQ_DOMAIN_HIERARCHY would help.
The irq-mux only muxes irq signal without performing any operations usually
done by an interrupt controller.
That's why I used interrupt-map in the irq-mux.
The only information needed by the irq-mux is the interrupt line muxing that
needs to be applied. This information is available in the interrupt-map.
If we introduce IRQ_DOMAIN_HIERARCHY, either it is done at gpio controller
level to route gpio interrupts to GIC interrupts and, in that case, the
irq-mux is skipped and cannot apply the muxing.
Or it is introduced at irq-mux level and irq-mux need to be an interrupt
controller but is component is not an interrupt controller.
Maybe I missed some points or I misunderstood the purpose of
IRQ_DOMAIN_HIERARCHY.
Can you give me some details on how IRQ_DOMAIN_HIERARCHY should be
used in my case?
Best regards,
Hervé
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