[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251002184120.495193-3-akshayaj.lkd@gmail.com>
Date: Fri, 3 Oct 2025 00:11:03 +0530
From: Akshay Jindal <akshayaj.lkd@...il.com>
To: dan@...obertson.com,
jic23@...nel.org,
dlechner@...libre.com,
nuno.sa@...log.com,
andy@...nel.org
Cc: Akshay Jindal <akshayaj.lkd@...il.com>,
shuah@...nel.org,
linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v3 2/5] iio: accel: bma400: Use macros for generic event configuration values
Add macros and enums for configuration values used in generic event
handling for activity and inactivity detection. Replace hard-coded
values in activity_event_en() with the new definitions to make the
configuration explicit.
No functional changes are intended.
Signed-off-by: Akshay Jindal <akshayaj.lkd@...il.com>
---
drivers/iio/accel/bma400.h | 30 ++++++++++++++++++++++++++++++
drivers/iio/accel/bma400_core.c | 14 +++++++++++---
2 files changed, 41 insertions(+), 3 deletions(-)
diff --git a/drivers/iio/accel/bma400.h b/drivers/iio/accel/bma400.h
index ae3411c090c9..13fe2e5a3175 100644
--- a/drivers/iio/accel/bma400.h
+++ b/drivers/iio/accel/bma400.h
@@ -106,8 +106,38 @@
#define BMA400_GEN1INT_CONFIG0_REG 0x3f
#define BMA400_GEN2INT_CONFIG0_REG 0x4A
#define BMA400_GENINT_CONFIG0_HYST_MASK GENMASK(1, 0)
+#define BMA400_GENINT_CONFIG0_REF_UPD_MODE_MASK GENMASK(3, 2)
+#define BMA400_GENINT_CONFIG0_DATA_SRC_MASK BIT(4)
+#define BMA400_GENINT_CONFIG0_X_EN_MASK BIT(5)
+#define BMA400_GENINT_CONFIG0_Y_EN_MASK BIT(6)
+#define BMA400_GENINT_CONFIG0_Z_EN_MASK BIT(7)
+
+enum bma400_accel_data_src {
+ ACCEL_FILT1,
+ ACCEL_FILT2,
+};
+
+enum bma400_ref_updt_mode {
+ BMA400_REF_MANUAL_UPDT_MODE,
+ BMA400_REF_ONETIME_UPDT_MODE,
+ BMA400_REF_EVERYTIME_UPDT_MODE,
+ BMA400_REF_EVERYTIME_LP_UPDT_MODE,
+};
#define BMA400_GEN_CONFIG1_OFF 0x01
+#define BMA400_GENINT_CONFIG1_AXES_COMB_MASK BIT(0)
+#define BMA400_GENINT_CONFIG1_DETCT_CRIT_MASK BIT(1)
+
+enum bma400_genintr_acceleval_axescomb {
+ BMA400_EVAL_X_OR_Y_OR_Z,
+ BMA400_EVAL_X_AND_Y_AND_Z,
+};
+
+enum bma400_detect_criterion {
+ BMA400_DETECT_INACTIVITY,
+ BMA400_DETECT_ACTIVITY,
+};
+
#define BMA400_GEN_CONFIG2_OFF 0x02
#define BMA400_GEN_CONFIG3_OFF 0x03
#define BMA400_GEN_CONFIG31_OFF 0x04
diff --git a/drivers/iio/accel/bma400_core.c b/drivers/iio/accel/bma400_core.c
index 35d2b90425f8..58c378ba9931 100644
--- a/drivers/iio/accel/bma400_core.c
+++ b/drivers/iio/accel/bma400_core.c
@@ -1166,14 +1166,16 @@ static int bma400_activity_event_en(struct bma400_data *data,
case IIO_EV_DIR_RISING:
reg = BMA400_GEN1INT_CONFIG0_REG;
msk = BMA400_INT_CONFIG0_GEN1_MASK;
- value = 2;
+ value = FIELD_PREP(BMA400_GENINT_CONFIG1_AXES_COMB_MASK, BMA400_EVAL_X_OR_Y_OR_Z) |
+ FIELD_PREP(BMA400_GENINT_CONFIG1_DETCT_CRIT_MASK, BMA400_DETECT_ACTIVITY);
set_mask_bits(&field_value, BMA400_INT_CONFIG0_GEN1_MASK,
FIELD_PREP(BMA400_INT_CONFIG0_GEN1_MASK, state));
break;
case IIO_EV_DIR_FALLING:
reg = BMA400_GEN2INT_CONFIG0_REG;
msk = BMA400_INT_CONFIG0_GEN2_MASK;
- value = 0;
+ value = FIELD_PREP(BMA400_GENINT_CONFIG1_AXES_COMB_MASK, BMA400_EVAL_X_OR_Y_OR_Z) |
+ FIELD_PREP(BMA400_GENINT_CONFIG1_DETCT_CRIT_MASK, BMA400_DETECT_INACTIVITY);
set_mask_bits(&field_value, BMA400_INT_CONFIG0_GEN2_MASK,
FIELD_PREP(BMA400_INT_CONFIG0_GEN2_MASK, state));
break;
@@ -1182,7 +1184,13 @@ static int bma400_activity_event_en(struct bma400_data *data,
}
/* Enabling all axis for interrupt evaluation */
- ret = regmap_write(data->regmap, reg, 0xF8);
+ ret = regmap_write(data->regmap, reg,
+ BMA400_GENINT_CONFIG0_X_EN_MASK |
+ BMA400_GENINT_CONFIG0_Y_EN_MASK |
+ BMA400_GENINT_CONFIG0_Z_EN_MASK|
+ FIELD_PREP(BMA400_GENINT_CONFIG0_DATA_SRC_MASK, ACCEL_FILT2)|
+ FIELD_PREP(BMA400_GENINT_CONFIG0_REF_UPD_MODE_MASK,
+ BMA400_REF_EVERYTIME_UPDT_MODE));
if (ret)
return ret;
--
2.43.0
Powered by blists - more mailing lists