linux-kernel - Re: [PATCH v2 2/3] spi: axiado: Add driver for Axiado SPI DB controller

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Message-ID: <202510021040.CnRgMGPA-lkp@intel.com>
Date: Thu, 2 Oct 2025 10:26:34 +0800
From: kernel test robot <lkp@...el.com>
To: Vladimir Moravcevic <vmoravcevic@...ado.com>,
	Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Harshit Shah <hshah@...ado.com>,
	Tzu-Hao Wei <twei@...ado.com>,
	Axiado Reviewers <linux-maintainer@...ado.com>
Cc: oe-kbuild-all@...ts.linux.dev, linux-spi@...r.kernel.org,
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Vladimir Moravcevic <vmoravcevic@...ado.com>,
	Prasad Bolisetty <pbolisetty@...ado.com>
Subject: Re: [PATCH v2 2/3] spi: axiado: Add driver for Axiado SPI DB
 controller

Hi Vladimir,

kernel test robot noticed the following build warnings:

[auto build test WARNING on e6b9dce0aeeb91dfc0974ab87f02454e24566182]

url:    https://github.com/intel-lab-lkp/linux/commits/Vladimir-Moravcevic/dt-bindings-spi-axiado-ax3000-spi-Add-binding-for-Axiado-SPI-DB-controller/20250929-170017
base:   e6b9dce0aeeb91dfc0974ab87f02454e24566182
patch link:    https://lore.kernel.org/r/20250929-axiado-ax3000-soc-spi-db-controller-driver-v2-2-b0c089c3ba81%40axiado.com
patch subject: [PATCH v2 2/3] spi: axiado: Add driver for Axiado SPI DB controller
config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20251002/202510021040.CnRgMGPA-lkp@intel.com/config)
compiler: alpha-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251002/202510021040.CnRgMGPA-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202510021040.CnRgMGPA-lkp@intel.com/

All warnings (new ones prefixed by >>):

   drivers/spi/spi-axiado.c: In function 'ax_spi_irq':
>> drivers/spi/spi-axiado.c:348:21: warning: variable 'status' set but not used [-Wunused-but-set-variable]
     348 |         irqreturn_t status;
         |                     ^~~~~~


vim +/status +348 drivers/spi/spi-axiado.c

   330	
   331	/**
   332	 * ax_spi_irq - Interrupt service routine of the SPI controller
   333	 * @irq:	IRQ number
   334	 * @dev_id:	Pointer to the xspi structure
   335	 *
   336	 * This function handles RX FIFO almost full and Host Transfer Completed interrupts only.
   337	 * On RX FIFO amlost full interrupt this function reads the received data from RX FIFO and
   338	 * fills the TX FIFO if there is any data remaining to be transferred.
   339	 * On Host Transfer Completed interrupt this function indicates that transfer is completed,
   340	 * the SPI subsystem will clear MTC bit.
   341	 *
   342	 * Return:	IRQ_HANDLED when handled; IRQ_NONE otherwise.
   343	 */
   344	static irqreturn_t ax_spi_irq(int irq, void *dev_id)
   345	{
   346		struct spi_controller *ctlr = dev_id;
   347		struct ax_spi *xspi = spi_controller_get_devdata(ctlr);
 > 348		irqreturn_t status;
   349		u32 intr_status;
   350	
   351		status = IRQ_NONE;
   352		intr_status = ax_spi_read(xspi, AX_SPI_IVR);
   353		if (!intr_status)
   354			return IRQ_NONE;
   355	
   356		/*
   357		 * Handle "Message Transfer Complete" interrupt.
   358		 * This means all bytes have been shifted out of the TX FIFO.
   359		 * It's time to harvest the final incoming bytes from the RX FIFO.
   360		 */
   361		if (intr_status & AX_SPI_IVR_MTCV) {
   362			// Clear the MTC interrupt flag immediately.
   363			ax_spi_write(xspi, AX_SPI_ISR, AX_SPI_ISR_MTC);
   364	
   365			// For a TX-only transfer, rx_buf would be NULL.
   366			// In the spi-core, rx_copy_remaining would be 0.
   367			// So we can finalize immediately.
   368			if (!xspi->rx_buf) {
   369				ax_spi_write(xspi, AX_SPI_IMR, 0x00);
   370				spi_finalize_current_transfer(ctlr);
   371				return IRQ_HANDLED;
   372			}
   373	
   374			// For a full-duplex transfer, process any remaining RX data.
   375			// The helper function will handle finalization if everything is received.
   376			ax_spi_process_rx_and_finalize(ctlr);
   377			return IRQ_HANDLED;
   378		}
   379	
   380		/*
   381		 * Handle "RX FIFO Full / Threshold Met" interrupt.
   382		 * This means we need to make space in the RX FIFO by reading from it.
   383		 */
   384		if (intr_status & AX_SPI_IVR_RFFV) {
   385			if (ax_spi_process_rx_and_finalize(ctlr)) {
   386				// Transfer was finalized inside the helper, we are done.
   387			} else {
   388				// RX is not yet complete. If there are still TX bytes to send
   389				// (for very long transfers), we can fill the TX FIFO again.
   390				if (xspi->tx_bytes)
   391					ax_spi_fill_tx_fifo(xspi);
   392			}
   393			return IRQ_HANDLED;
   394		}
   395	
   396		return IRQ_NONE;
   397	}
   398	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki