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Message-ID:
 <TY3PR01MB11346B17DEFEAC5B18267B64186E7A@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Thu, 2 Oct 2025 07:15:05 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: geert <geert@...ux-m68k.org>, biju.das.au <biju.das.au@...il.com>
CC: Linus Walleij <linus.walleij@...aro.org>, Prabhakar Mahadev Lad
	<prabhakar.mahadev-lad.rj@...renesas.com>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3] pinctrl: renesas: rzg2l: Drop the unnecessary pin
 configurations

Hi Geert,

Thanks for the feedback.

> -----Original Message-----
> From: Geert Uytterhoeven <geert@...ux-m68k.org>
> Subject: Re: [PATCH v3] pinctrl: renesas: rzg2l: Drop the unnecessary pin configurations
> 
> Hi Biju,
> 
> On Tue, 9 Sept 2025 at 12:42, Biju <biju.das.au@...il.com> wrote:
> > From: Biju Das <biju.das.jz@...renesas.com>
> >
> > There is no need to reconfigure the pin if the pin's configuration
> > values are same as the reset values. E.g.: PS0 pin configuration for
> > NMI function is PMC = 1 and PFC = 0 and is same as that of reset
> > values. Currently the code is first setting it to GPIO HI-Z state and
> > then again reconfiguring to NMI function leading to spurious IRQ. Drop
> > the unnecessary pin configurations from the driver.
> >
> > Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> 
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -541,9 +541,16 @@ static void rzg2l_pinctrl_set_pfc_mode(struct rzg2l_pinctrl *pctrl,
> >                                        u8 pin, u8 off, u8 func)  {
> >         unsigned long flags;
> > -       u32 reg;
> > +       u32 reg, pfc;
> >
> > +       /* Switching to GPIO is not required if reset value is same as func */
> > +       reg = readb(pctrl->base + PMC(off));
> 
> I am updating the commit to move this assignment inside the spinlock
> below.
> 
> >         spin_lock_irqsave(&pctrl->lock, flags);
> > +       pfc = readl(pctrl->base + PFC(off));
> > +       if ((reg & BIT(pin)) && (((pfc >> (pin * 4)) & PFC_MASK) == func)) {
> > +               spin_unlock_irqrestore(&pctrl->lock, flags);
> > +               return;
> > +       }
> 
> To ease backporting "[PATCH v2] pinctrl: renesas: rzg2l: Fix ISEL
> restore on resume"[1], I am rebasing this commit on top of the latter.


It is ok to me.

Cheers,
Biju

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