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Message-Id: <20251003091911.3269073-2-tessolveupstream@gmail.com>
Date: Fri,  3 Oct 2025 14:49:11 +0530
From: Sudarshan Shetty <tessolveupstream@...il.com>
To: andrzej.hajda@...el.com,
	neil.armstrong@...aro.org
Cc: rfoss@...nel.org,
	Laurent.pinchart@...asonboard.com,
	tessolveupstream@...il.com,
	jonas@...boo.se,
	jernej.skrabec@...il.com,
	maarten.lankhorst@...ux.intel.com,
	mripard@...nel.org,
	tzimmermann@...e.de,
	airlied@...il.com,
	simona@...ll.ch,
	dri-devel@...ts.freedesktop.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH] drm: bridge: ti-sn65dsi83: Fix LVDS output configuration

Update the SN65DSI83 bridge driver to improve LVDS output
stability and correctness:

- Program additional device registers during initialization to ensure
   proper LVDS configuration.
- Adjust the DSI mode_flags to match the recommended settings.

Both changes are based on guidance from TI SN65DSI83 experts, addressing
cases where the existing driver configuration was insufficient.

Signed-off-by: Sudarshan Shetty <tessolveupstream@...il.com>
---
 drivers/gpu/drm/bridge/ti-sn65dsi83.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index 033c44326552..d6a2b20be1fe 100644
--- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
+++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
@@ -613,6 +613,20 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge,
 		     mode->hsync_start - mode->hdisplay);
 	regmap_write(ctx->regmap, REG_VID_CHA_VERTICAL_FRONT_PORCH,
 		     mode->vsync_start - mode->vdisplay);
+
+	regmap_write(ctx->regmap, 0x0A, 0x05);
+	regmap_write(ctx->regmap, 0x0D, 0x00);
+	regmap_write(ctx->regmap, 0x12, 0x53);
+	regmap_write(ctx->regmap, 0x18, 0x6f);
+	regmap_write(ctx->regmap, 0x19, 0x00);
+	regmap_write(ctx->regmap, 0x24, 0x00);
+	regmap_write(ctx->regmap, 0x25, 0x00);
+	regmap_write(ctx->regmap, 0x2c, 0x10);
+	regmap_write(ctx->regmap, 0x34, 0x28);
+	regmap_write(ctx->regmap, 0x36, 0x00);
+	regmap_write(ctx->regmap, 0x38, 0x00);
+	regmap_write(ctx->regmap, 0x3A, 0x00);
+
 	regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN, 0x00);
 
 	/* Enable PLL */
@@ -912,9 +926,7 @@ static int sn65dsi83_host_attach(struct sn65dsi83 *ctx)
 
 	dsi->lanes = dsi_lanes;
 	dsi->format = MIPI_DSI_FMT_RGB888;
-	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
-			  MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP |
-			  MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET;
+	dsi->mode_flags = MIPI_DSI_MODE_VIDEO;
 
 	ret = devm_mipi_dsi_attach(dev, dsi);
 	if (ret < 0) {
-- 
2.34.1


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