linux-kernel - Re: [RFC PATCH v2 05/18] iommu/riscv: Prepare to use MSI table

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Message-ID:
 <KUZPR04MB92650FF9B2E10BC4BBA5F707F3E2A@KUZPR04MB9265.apcprd04.prod.outlook.com>
Date: Sun, 5 Oct 2025 16:30:25 +0800
From: "Nutty.Liu" <nutty.liu@...mail.com>
To: Andrew Jones <ajones@...tanamicro.com>, iommu@...ts.linux.dev,
 kvm-riscv@...ts.infradead.org, kvm@...r.kernel.org,
 linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Cc: jgg@...dia.com, zong.li@...ive.com, tjeznach@...osinc.com,
 joro@...tes.org, will@...nel.org, robin.murphy@....com, anup@...infault.org,
 atish.patra@...ux.dev, tglx@...utronix.de, alex.williamson@...hat.com,
 paul.walmsley@...ive.com, palmer@...belt.com, alex@...ti.fr
Subject: Re: [RFC PATCH v2 05/18] iommu/riscv: Prepare to use MSI table

On 9/21/2025 4:38 AM, Andrew Jones wrote:
> Capture the IMSIC layout from its config and reserve all the addresses.
> Then use the IMSIC layout info to calculate the maximum number of PTEs
> the MSI table needs to support and allocate the MSI table when attaching
> a paging domain for the first time. Finally, at the same time, map the
> IMSIC addresses in the stage1 DMA table when the stage1 DMA table is not
> BARE. This ensures it doesn't fault as it will translate the addresses
> before the MSI table does.
>
> Signed-off-by: Andrew Jones <ajones@...tanamicro.com>
> ---
>   drivers/iommu/riscv/iommu-ir.c | 186 +++++++++++++++++++++++++++++++++
>   drivers/iommu/riscv/iommu.c    |   6 ++
>   drivers/iommu/riscv/iommu.h    |   4 +
>   3 files changed, 196 insertions(+)
Reviewed-by: Nutty Liu <nutty.liu@...mail.com>

Thanks,
Nutty