linux-kernel - Re: [PATCH net-next V6] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs

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Message-Id: <0097472c-10fd-42b4-8430-c65f958b0c7d@app.fastmail.com>
Date: Mon, 06 Oct 2025 15:59:33 +0200
From: "Arnd Bergmann" <arnd@...db.de>
To: "Sebastian Ott" <sebott@...hat.com>, "Tariq Toukan" <tariqt@...dia.com>
Cc: "Catalin Marinas" <catalin.marinas@....com>,
 "Eric Dumazet" <edumazet@...gle.com>, "Jakub Kicinski" <kuba@...nel.org>,
 "Paolo Abeni" <pabeni@...hat.com>, "Andrew Lunn" <andrew+netdev@...n.ch>,
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 "Patrisious Haddad" <phaddad@...dia.com>
Subject: Re: [PATCH net-next V6] net/mlx5: Improve write-combining test reliability for
 ARM64 Grace CPUs

On Mon, Oct 6, 2025, at 15:57, Sebastian Ott wrote:
> On Mon, 29 Sep 2025, Tariq Toukan wrote:
>> +static void mlx5_iowrite64_copy(struct mlx5_wc_sq *sq, __be32 mmio_wqe[16],
>> +				size_t mmio_wqe_size, unsigned int offset)
>> +{
>> +#if IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && IS_ENABLED(CONFIG_ARM64)
>> +	if (cpu_has_neon()) {
>> +		kernel_neon_begin();
>> +		asm volatile
>> +		(".arch_extension simd;\n\t"
>> +		"ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [%0]\n\t"
>> +		"st1 {v0.16b, v1.16b, v2.16b, v3.16b}, [%1]"
>> +		:
>> +		: "r"(mmio_wqe), "r"(sq->bfreg.map + offset)
>> +		: "memory", "v0", "v1", "v2", "v3");
>> +		kernel_neon_end();
>> +		return;
>> +	}
>> +#endif
>
> This one breaks the build for me:
> /tmp/cc2vw3CJ.s: Assembler messages:
> /tmp/cc2vw3CJ.s:391: Error: unknown architectural extension `simd;'
>
> Removing the extra ";" after simd seems to fix it.

I sent that fixup earlier today:

https://lore.kernel.org/all/20251006115640.497169-1-arnd@kernel.org/

     Arnd