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Message-ID: <68fbfa0a-605c-4b6f-8ef6-33ebeea8909a@kernel.org>
Date: Mon, 6 Oct 2025 23:23:23 +0900
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jingyi Wang <jingyi.wang@....qualcomm.com>,
 Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, aiqun.yu@....qualcomm.com,
 tingwei.zhang@....qualcomm.com, trilok.soni@....qualcomm.com,
 yijie.yang@....qualcomm.com, Qiang Yu <qiang.yu@....qualcomm.com>
Subject: Re: [PATCH 04/20] arm64: dts: qcom: kaanapali: Add support for PCIe0
 on Kaanapali

On 25/09/2025 09:17, Jingyi Wang wrote:
> From: Qiang Yu <qiang.yu@....qualcomm.com>
> 
> Describe PCIe0 controller and PHY. Also add required system resources like
> regulators, clocks, interrupts and registers configuration for PCIe0.
> 
> Signed-off-by: Qiang Yu <qiang.yu@....qualcomm.com>
> Signed-off-by: Jingyi Wang <jingyi.wang@....qualcomm.com>
> ---
>  arch/arm64/boot/dts/qcom/kaanapali.dtsi | 182 +++++++++++++++++++++++++++++++-
>  1 file changed, 181 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> index b385b4642883..07dc112065d1 100644
> --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi
> @@ -452,7 +452,7 @@ gcc: clock-controller@...000 {
>  			clocks = <&bi_tcxo_div2>,
>  				 <0>,
>  				 <&sleep_clk>,
> -				 <0>,


Why are you removing lines which you just added? What sort of buggy
patch was before?

> +				 <&pcie0_phy>,
>  				 <0>,
>  				 <0>,
>  				 <0>,


Best regards,
Krzysztof

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