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Message-Id: <20251006-topic-sm8x50-next-hdk-i2s-v1-6-184b15a87e0a@linaro.org>
Date: Mon, 06 Oct 2025 20:37:19 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Srinivas Kandagatla <srini@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-sound@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Neil Armstrong <neil.armstrong@...aro.org>
Subject: [PATCH RFC 6/6] sm8450-hdk: Enable I2S for HDMI
Add the necessary nodes to configure the right I2S interface
to output audio via the DSI HDMI bridge.
Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 30 +++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sm8450.dtsi | 40 +++++++++++++++++++++++++++++++++
2 files changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index 0c6aa7ddf43263f30595b3f0733ec3e126e38608..c8fd4c8c6bc644ccb5f9fb05c099f27513b86e99 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -667,6 +667,8 @@ lt9611_codec: hdmi-bridge@2b {
pinctrl-names = "default";
pinctrl-0 = <<9611_irq_pin <9611_rst_pin>;
+ #sound-dai-cells = <1>;
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -1016,6 +1018,18 @@ &sound {
"TX SWR_INPUT0", "ADC3_OUTPUT",
"TX SWR_INPUT1", "ADC4_OUTPUT";
+ pinctrl-0 = <&i2s0_default_state>, <&audio_mclk0_default_state>;
+ pinctrl-names = "default";
+ clocks = <&q6prmcc LPASS_CLK_ID_PRI_MI2S_IBIT LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "pri-mi2s",
+ "pri-mclk";
+
+ assigned-clocks = <&q6prmcc LPASS_CLK_ID_PRI_MI2S_IBIT LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_CLK_ID_MCLK_1 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ assigned-clock-rates = <1536000>,
+ <24576000>;
+
wcd-playback-dai-link {
link-name = "WCD Playback";
@@ -1079,6 +1093,22 @@ platform {
sound-dai = <&q6apm>;
};
};
+
+ prim-mi2s-dai-link {
+ link-name = "Primary MI2S Playback";
+
+ cpu {
+ sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>;
+ };
+
+ codec {
+ sound-dai = <<9611_codec 0>;
+ };
+
+ platform {
+ sound-dai = <&q6apm>;
+ };
+ };
};
&swr0 {
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 23420e6924728cb80fc9e44fb4d7e01fbffae21f..5ddc1169e8c23327261820f7baa31983a3eb0bf8 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4288,6 +4288,46 @@ qup_uart20_default: qup-uart20-default-state {
pins = "gpio76", "gpio77", "gpio78", "gpio79";
function = "qup20";
};
+
+ audio_mclk0_default_state: audio-mclk0-default-state {
+ pins = "gpio125";
+ function = "pri_mi2s";
+ drive-strength = <8>;
+ bias-disable;
+ output-high;
+ };
+
+ i2s0_default_state: i2s0-default-state {
+ sck-pins {
+ pins = "gpio126";
+ function = "mi2s0_sck";
+ drive-strength = <8>;
+ bias-disable;
+ output-high;
+ };
+
+ data0-pins {
+ pins = "gpio127";
+ function = "mi2s0_data0";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ data1-pins {
+ pins = "gpio128";
+ function = "mi2s0_data1";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ ws-pins {
+ pins = "gpio129";
+ function = "mi2s0_ws";
+ drive-strength = <8>;
+ bias-disable;
+ output-high;
+ };
+ };
};
lpass_tlmm: pinctrl@...0000 {
--
2.34.1
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