linux-kernel - Re: [PATCH v10 01/15] x86/cpu: Enumerate the LASS feature bits

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Message-ID: <72f051a1-403e-492b-8a37-81b18a651851@intel.com>
Date: Tue, 7 Oct 2025 13:53:02 -0700
From: Sohil Mehta <sohil.mehta@...el.com>
To: "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>, "Hansen, Dave"
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Subject: Re: [PATCH v10 01/15] x86/cpu: Enumerate the LASS feature bits

On 10/7/2025 1:38 PM, Edgecombe, Rick P wrote:
>> One could argue that the LASS hardware enforcement of the kernel data
>> accesses *depends* on SMAP being enabled.
> 
> The fetch part doesn't though?

That's right. The instruction fetches could have depended on SMEP but
the spec explicitly calls out that it does not.

"A supervisor-mode instruction fetch causes a LASS violation if it would
accesses a linear address of which bit 63 is 0. (Unlike paging, this
behavior of LASS applies regardless of the setting of CR4.SMEP.)"