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Message-ID: <2025100735-gulf-error-2ce2@gregkh>
Date: Tue, 7 Oct 2025 07:51:27 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: Roy Luo <royluo@...gle.com>
Cc: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Peter Griffin <peter.griffin@...aro.org>,
André Draszik <andre.draszik@...aro.org>,
Tudor Ambarus <tudor.ambarus@...aro.org>,
Joy Chakraborty <joychakr@...gle.com>,
Naveen Kumar <mnkumar@...gle.com>, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-usb@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org
Subject: Re: [PATCH v1 3/4] usb: dwc3: Add Google SoC USB PHY driver
On Mon, Oct 06, 2025 at 11:21:24PM +0000, Roy Luo wrote:
> Support the USB PHY found on Google Tensor SoCs.
That's great, but that's not what your subject line says (it says "usb:
dwc3")
> This particular USB PHY supports both high-speed and super-speed
> operations, and is paired with the SNPS DWC3 controller that's also
> integrated on the SoCs.
> This initial patch specifically adds functionality for high-speed.
>
> Co-developed-by: Joy Chakraborty <joychakr@...gle.com>
> Signed-off-by: Joy Chakraborty <joychakr@...gle.com>
> Co-developed-by: Naveen Kumar <mnkumar@...gle.com>
> Signed-off-by: Naveen Kumar <mnkumar@...gle.com>
> Signed-off-by: Roy Luo <royluo@...gle.com>
> ---
> drivers/phy/Kconfig | 1 +
> drivers/phy/Makefile | 1 +
> drivers/phy/google/Kconfig | 15 ++
> drivers/phy/google/Makefile | 2 +
> drivers/phy/google/phy-google-usb.c | 286 ++++++++++++++++++++++++++++
And as others said, you don't need a whole new directory for one single
.c file.
thanks,
greg k-h
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