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Message-ID: <20251007055511.108984-5-akshayaj.lkd@gmail.com>
Date: Tue, 7 Oct 2025 11:25:04 +0530
From: Akshay Jindal <akshayaj.lkd@...il.com>
To: dan@...obertson.com,
jic23@...nel.org,
dlechner@...libre.com,
nuno.sa@...log.com,
andy@...nel.org
Cc: Akshay Jindal <akshayaj.lkd@...il.com>,
shuah@...nel.org,
linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v4 4/6] iio: accel: bma400: Replace bit shifts with FIELD_PREP and FIELD_GET
set_* functions involve left shift of param values into respective
register fields before writing to register. Similarly get_* functions
involve right shift to extract values from the respective bit fields.
Replace these explicit shifting statements with standard kernel style
macros FIELD_GET and FIELD_PREP.
Signed-off-by: Akshay Jindal <akshayaj.lkd@...il.com>
---
drivers/iio/accel/bma400.h | 3 ---
drivers/iio/accel/bma400_core.c | 12 ++++++------
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/iio/accel/bma400.h b/drivers/iio/accel/bma400.h
index 12836111710e..d0e91481c799 100644
--- a/drivers/iio/accel/bma400.h
+++ b/drivers/iio/accel/bma400.h
@@ -68,7 +68,6 @@
*/
#define BMA400_ACC_CONFIG0_REG 0x19
#define BMA400_ACC_CONFIG0_LP_OSR_MASK GENMASK(6, 5)
-#define BMA400_LP_OSR_SHIFT 5
#define BMA400_ACC_CONFIG1_REG 0x1a
#define BMA400_ACC_CONFIG1_ODR_MASK GENMASK(3, 0)
@@ -79,9 +78,7 @@
#define BMA400_ACC_CONFIG1_ODR_MIN_WHOLE_HZ 25
#define BMA400_ACC_CONFIG1_ODR_MIN_HZ 12
#define BMA400_ACC_CONFIG1_NP_OSR_MASK GENMASK(5, 4)
-#define BMA400_NP_OSR_SHIFT 4
#define BMA400_ACC_CONFIG1_ACC_RANGE_MASK GENMASK(7, 6)
-#define BMA400_ACC_RANGE_SHIFT 6
#define BMA400_ACC_CONFIG2_REG 0x1b
diff --git a/drivers/iio/accel/bma400_core.c b/drivers/iio/accel/bma400_core.c
index a0e994f9882b..665c8df93008 100644
--- a/drivers/iio/accel/bma400_core.c
+++ b/drivers/iio/accel/bma400_core.c
@@ -627,7 +627,7 @@ static int bma400_get_accel_oversampling_ratio(struct bma400_data *data)
return ret;
}
- osr = (val & BMA400_ACC_CONFIG0_LP_OSR_MASK) >> BMA400_LP_OSR_SHIFT;
+ osr = FIELD_GET(BMA400_ACC_CONFIG0_LP_OSR_MASK, val);
data->oversampling_ratio = osr;
return 0;
@@ -638,7 +638,7 @@ static int bma400_get_accel_oversampling_ratio(struct bma400_data *data)
return ret;
}
- osr = (val & BMA400_ACC_CONFIG1_NP_OSR_MASK) >> BMA400_NP_OSR_SHIFT;
+ osr = FIELD_GET(BMA400_ACC_CONFIG1_NP_OSR_MASK, val);
data->oversampling_ratio = osr;
return 0;
@@ -673,7 +673,7 @@ static int bma400_set_accel_oversampling_ratio(struct bma400_data *data,
ret = regmap_write(data->regmap, BMA400_ACC_CONFIG0_REG,
(acc_config & ~BMA400_ACC_CONFIG0_LP_OSR_MASK) |
- (val << BMA400_LP_OSR_SHIFT));
+ FIELD_PREP(BMA400_ACC_CONFIG0_LP_OSR_MASK, val));
if (ret) {
dev_err(data->dev, "Failed to write out OSR\n");
return ret;
@@ -689,7 +689,7 @@ static int bma400_set_accel_oversampling_ratio(struct bma400_data *data,
ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG,
(acc_config & ~BMA400_ACC_CONFIG1_NP_OSR_MASK) |
- (val << BMA400_NP_OSR_SHIFT));
+ FIELD_PREP(BMA400_ACC_CONFIG1_NP_OSR_MASK, val));
if (ret) {
dev_err(data->dev, "Failed to write out OSR\n");
return ret;
@@ -730,7 +730,7 @@ static int bma400_get_accel_scale(struct bma400_data *data)
if (ret)
return ret;
- raw_scale = (val & BMA400_ACC_CONFIG1_ACC_RANGE_MASK) >> BMA400_ACC_RANGE_SHIFT;
+ raw_scale = FIELD_GET(BMA400_ACC_CONFIG1_ACC_RANGE_MASK, val);
if (raw_scale > BMA400_TWO_BITS_MASK)
return -EINVAL;
@@ -755,7 +755,7 @@ static int bma400_set_accel_scale(struct bma400_data *data, unsigned int val)
ret = regmap_write(data->regmap, BMA400_ACC_CONFIG1_REG,
(acc_config & ~BMA400_ACC_CONFIG1_ACC_RANGE_MASK) |
- (raw << BMA400_ACC_RANGE_SHIFT));
+ FIELD_PREP(BMA400_ACC_CONFIG1_ACC_RANGE_MASK, raw));
if (ret)
return ret;
--
2.43.0
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