linux-kernel - Re: [PATCH v2 1/2] KVM: x86: Advertise EferLmsleUnsupported to userspace

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Message-ID: <85qzvfqh0t.fsf@amd.com>
Date: Tue, 7 Oct 2025 07:59:14 +0000
From: Nikunj A Dadhania <nikunj@....com>
To: Jim Mattson <jmattson@...gle.com>, Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>, Dave Hansen
	<dave.hansen@...ux.intel.com>, <x86@...nel.org>, "H. Peter Anvin"
	<hpa@...or.com>, Sean Christopherson <seanjc@...gle.com>, Paolo Bonzini
	<pbonzini@...hat.com>, Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>, "Tom
 Lendacky" <thomas.lendacky@....com>, Jim Mattson <jmattson@...gle.com>,
	"Perry Yuan" <perry.yuan@....com>, Sohil Mehta <sohil.mehta@...el.com>, "Xin
 Li (Intel)" <xin@...or.com>, Joerg Roedel <joerg.roedel@....com>, Avi Kivity
	<avi@...hat.com>, <linux-kernel@...r.kernel.org>, <kvm@...r.kernel.org>,
	Yosry Ahmed <yosry.ahmed@...ux.dev>
Subject: Re: [PATCH v2 1/2] KVM: x86: Advertise EferLmsleUnsupported to
 userspace

Jim Mattson <jmattson@...gle.com> writes:

> CPUID.80000008H:EBX.EferLmsleUnsupported[bit 20] is a defeature
> bit. When this bit is clear, EFER.LMSLE is supported. When this bit is
> set, EFER.LMLSE is unsupported. KVM has never supported EFER.LMSLE, so
> it cannot support a 0-setting of this bit.
>
> Pass through the bit in KVM_GET_SUPPORTED_CPUID to advertise the
> unavailability of EFER.LMSLE to userspace.
>
> Signed-off-by: Jim Mattson <jmattson@...gle.com>

Reviewed-by: Nikunj A Dadhania <nikunj@....com>

> ---
>  v1 -> v2:
>    Pass through the bit from hardware, rather than forcing it to be set.
>
>  arch/x86/include/asm/cpufeatures.h | 1 +
>  arch/x86/kvm/cpuid.c               | 1 +
>  2 files changed, 2 insertions(+)
>
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 751ca35386b0..f9b593721917 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -338,6 +338,7 @@
>  #define X86_FEATURE_AMD_STIBP		(13*32+15) /* Single Thread Indirect Branch Predictors */
>  #define X86_FEATURE_AMD_STIBP_ALWAYS_ON	(13*32+17) /* Single Thread Indirect Branch Predictors always-on preferred */
>  #define X86_FEATURE_AMD_IBRS_SAME_MODE	(13*32+19) /* Indirect Branch Restricted Speculation same mode protection*/
> +#define X86_FEATURE_EFER_LMSLE_MBZ	(13*32+20) /* EFER.LMSLE must be zero */
>  #define X86_FEATURE_AMD_PPIN		(13*32+23) /* "amd_ppin" Protected Processor Inventory Number */
>  #define X86_FEATURE_AMD_SSBD		(13*32+24) /* Speculative Store Bypass Disable */
>  #define X86_FEATURE_VIRT_SSBD		(13*32+25) /* "virt_ssbd" Virtualized Speculative Store Bypass Disable */
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index e2836a255b16..4823970611fd 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -1096,6 +1096,7 @@ void kvm_set_cpu_caps(void)
>  		F(AMD_STIBP),
>  		F(AMD_STIBP_ALWAYS_ON),
>  		F(AMD_IBRS_SAME_MODE),
> +		F(EFER_LMSLE_MBZ),
>  		F(AMD_PSFD),
>  		F(AMD_IBPB_RET),
>  	);
> -- 
> 2.51.0.618.g983fd99d29-goog