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Message-ID: <0ede72a9-4555-4e4d-959d-3a505b6598ee@molgen.mpg.de>
Date: Tue, 7 Oct 2025 10:26:10 +0200
From: Paul Menzel <pmenzel@...gen.mpg.de>
To: Ivan Mikhaylov <fr0st61te@...il.com>
Cc: Iwona Winiarska <iwona.winiarska@...el.com>,
Guenter Roeck <linux@...ck-us.net>, linux-hwmon@...r.kernel.org,
linux-kernel@...r.kernel.org, openbmc@...ts.ozlabs.org
Subject: Re: [PATCH 2/3] hwmon: (peci/dimmtemp) add Intel Emerald Rapids
platform support
Dear Ivan,
Thank you for your patch.
Am 06.10.25 um 23:53 schrieb Ivan Mikhaylov:
> Extend the functionality of hwmon (peci/dimmtemp) for Emerald Rapids
> platform.
>
> The patch has been tested on a 5S system with 16 DIMMs installed.
What is 5S? 5 sockets? (Probably not.)
> Verified read of DIMM temperature thresholds & temperature.
Also paste the output?
> Using Sapphire's callbacks about getting thresholds because it's same
> platform/socket.
>
> Signed-off-by: Ivan Mikhaylov <fr0st61te@...il.com>
> ---
> drivers/hwmon/peci/dimmtemp.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c
> index fbe82d9852e0..a281476c7a31 100644
> --- a/drivers/hwmon/peci/dimmtemp.c
> +++ b/drivers/hwmon/peci/dimmtemp.c
> @@ -32,6 +32,8 @@
> #define DIMM_IDX_MAX_ON_ICXD 2
> #define CHAN_RANK_MAX_ON_SPR 8
> #define DIMM_IDX_MAX_ON_SPR 2
> +#define CHAN_RANK_MAX_ON_EMR 8
> +#define DIMM_IDX_MAX_ON_EMR 2
>
> #define CHAN_RANK_MAX CHAN_RANK_MAX_ON_HSX
> #define DIMM_IDX_MAX DIMM_IDX_MAX_ON_HSX
> @@ -571,6 +573,12 @@ read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u
> return 0;
> }
>
> +static int read_thresholds_emr(struct peci_dimmtemp *priv, int dimm_order,
> + int chan_rank, u32 *data)
> +{
> + return read_thresholds_spr(priv, dimm_order, chan_rank, data);
> +}
> +
> static const struct dimm_info dimm_hsx = {
> .chan_rank_max = CHAN_RANK_MAX_ON_HSX,
> .dimm_idx_max = DIMM_IDX_MAX_ON_HSX,
> @@ -620,6 +628,13 @@ static const struct dimm_info dimm_spr = {
> .read_thresholds = &read_thresholds_spr,
> };
>
> +static const struct dimm_info dimm_emr = {
> + .chan_rank_max = CHAN_RANK_MAX_ON_EMR,
> + .dimm_idx_max = DIMM_IDX_MAX_ON_EMR,
> + .min_peci_revision = 0x40,
> + .read_thresholds = &read_thresholds_emr,
> +};
> +
> static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
> {
> .name = "peci_cpu.dimmtemp.hsx",
> @@ -649,6 +664,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
> .name = "peci_cpu.dimmtemp.spr",
> .driver_data = (kernel_ulong_t)&dimm_spr,
> },
> + {
> + .name = "peci_cpu.dimmtemp.emr",
> + .driver_data = (kernel_ulong_t)&dimm_emr,
> + },
> { }
> };
> MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids);
Reviewed-by: Paul Menzel <pmenzel@...gen.mpg.de>
Kind regards,
Paul
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