Message-ID: <CAN7C2SBDC2LrWpUTe3zZakHCrmUy1nQ-WiguLQKVK1CyOPb9zw@mail.gmail.com>
Date: Tue, 7 Oct 2025 21:39:59 +0800
From: Sune Brian <briansune@...il.com>
To: Charles Keepax <ckeepax@...nsource.cirrus.com>
Cc: Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>, 
	Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>, linux-sound@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] sound/soc/codecs/wm8978: add missing BCLK divider setup

Charles Keepax <ckeepax@...nsource.cirrus.com> 於 2025年10月7日 週二 下午9:15寫道：
>
> On Tue, Oct 07, 2025 at 08:48:40PM +0800, Sune Brian wrote:
> > Charles Keepax <ckeepax@...nsource.cirrus.com> 於 2025年10月7日 週二 下午8:11寫道：
> > > On Tue, Oct 07, 2025 at 07:22:10PM +0800, Sune Brian wrote:
> > > > Charles Keepax <ckeepax@...nsource.cirrus.com> 於 2025年10月7日 週二 下午6:30寫道：
> > > > > On Fri, Oct 03, 2025 at 05:13:04PM +0800, Brian Sune wrote:
> > > > > > The original WM8978 codec driver did not set the BCLK (bit clock)
> > > Its not missing its right there. That said your way is probably
> > > slightly more standard these days, but we should take care of the
> > > interaction between the two.
> >
> > What my missing meant is if run with DEBUG flag on that case had never
> > behave as expected.
> > MCLK and LRCLK both is correctly outputted. While the current
> > unpatched version will generate
> > wrong BCLK complete break the codec. As such I proposed the BCLK patch.
> > I had not investigate deep why it never calls but the "int div" is
> > loaded and computed by where is a bit puzzling.
> > And the loaded it simply with div on actual mclk/2/bit_per_channel is
> > also incorrect.
> > As mentioned in previous explanations, the clock register is a fix
> > table on dividing # that is a LUT with restricted # allowed.
>
> Yeah the existing code expects the machine driver to call
> snd_soc_dai_set_clkdiv. I am guessing you are using something
> like simple card that doesn't do this.
>
> To be clear the bulk of your patch is good, updating this in
> hw_params is probably more normal these days. But we need to
> make sure the two paths don't interfere with each other. Think
> of a system that is already calling snd_soc_dai_set_clkdiv() to
> set BCLKDIV, after your patch BCLKDIV will be set twice
> potentially to two different values and would generate no error
> messages.

Before the below action started. I need more background, if possible.
If my understand is correct on your ideas. Do you mean the default driver calls
the bclkdiv on other places? But how could that bclkdiv # be correct
from first place?
As I had mentioned the div # ifself like this codec is a LUT rather
than the actual divided #?
For example /32 from LUT is a 3b101?
For example what if MCLK is set higher than /64 could even out of the
LUT from first place.
The external div # passed in, how to ensure it is codec LUT compatible
from first place?

>
> I think you have two options:
>
> 1) Remove WM8978_BCLKDIV from wm8978_set_dai_clkdiv. There are no
>    upstream users that I can see, so this should be fine. This
>    would mean an out of tree user of snd_soc_dai_set_clkdiv would
>    now get an error so they know they need to fix something.
> 2) Only run your dynamic BCLK code if wm8978_set_dai_clkdiv
>    hasn't been called. This would mean any out of tree users of
>    snd_soc_dai_set_clkdiv would have no problems everything would
>    keep working as before, but at the cost of a little complexity
>    in the code.
>
> I am happy with either approach so which ever you prefer is fine
> with me.
>
> Thanks,
> Charles

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