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Message-ID: <20251008045836.vf4wz6cevosw6klq@hu-mojha-hyd.qualcomm.com>
Date: Wed, 8 Oct 2025 10:28:36 +0530
From: Mukesh Ojha <mukesh.ojha@....qualcomm.com>
To: Manivannan Sadhasivam <mani@...nel.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-remoteproc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 11/12] remoteproc: qcom: pas: Enable Secure PAS
support with IOMMU managed by Linux
On Tue, Oct 07, 2025 at 02:52:13PM -0700, Manivannan Sadhasivam wrote:
> On Tue, Oct 07, 2025 at 10:18:56PM +0530, Mukesh Ojha wrote:
> > Most Qualcomm platforms feature Gunyah hypervisor, which typically
> > handles IOMMU configuration. This includes mapping memory regions and
> > device memory resources for remote processors by intercepting
> > qcom_scm_pas_auth_and_reset() calls. These mappings are later removed
> > during teardown. Additionally, SHM bridge setup is required to enable
> > memory protection for both remoteproc metadata and its memory regions.
> > When the aforementioned hypervisor is absent, the operating system must
> > perform these configurations instead.
> >
> > When Linux runs as the hypervisor (@ EL2) on a SoC, it will have its
> > own device tree overlay file that specifies the firmware stream ID now
> > managed by Linux for a particular remote processor. If the iommus
> > property is specified in the remoteproc device tree node, it indicates
> > that IOMMU configuration must be handled by Linux. In this case, the
> > has_iommu flag is set for the remote processor, which ensures that the
> > resource table, carveouts, and SHM bridge are properly configured before
> > memory is passed to TrustZone for authentication. Otherwise, the
> > has_iommu flag remains unset, which indicates default behavior.
> >
> > Enables Secure PAS support for remote processors when IOMMU configuration
> > is managed by Linux.
> >
> > Signed-off-by: Mukesh Ojha <mukesh.ojha@....qualcomm.com>
> > ---
> > drivers/remoteproc/qcom_q6v5_pas.c | 61 ++++++++++++++++++++++++++++++++++----
> > 1 file changed, 56 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c
> > index ed7bd931dfd5..940fd89d4fc4 100644
> > --- a/drivers/remoteproc/qcom_q6v5_pas.c
> > +++ b/drivers/remoteproc/qcom_q6v5_pas.c
> > @@ -11,6 +11,7 @@
> > #include <linux/delay.h>
> > #include <linux/firmware.h>
> > #include <linux/interrupt.h>
> > +#include <linux/iommu.h>
> > #include <linux/kernel.h>
> > #include <linux/module.h>
> > #include <linux/of.h>
> > @@ -255,6 +256,22 @@ static int qcom_pas_load(struct rproc *rproc, const struct firmware *fw)
> > return ret;
> > }
> >
> > +static void qcom_pas_unmap_carveout(struct rproc *rproc, phys_addr_t mem_phys, size_t size)
> > +{
> > + if (rproc->has_iommu)
> > + iommu_unmap(rproc->domain, mem_phys, size);
> > +}
> > +
> > +static int qcom_pas_map_carveout(struct rproc *rproc, phys_addr_t mem_phys, size_t size)
> > +{
> > + int ret = 0;
> > +
> > + if (rproc->has_iommu)
> > + ret = iommu_map(rproc->domain, mem_phys, mem_phys, size,
> > + IOMMU_READ | IOMMU_WRITE, GFP_KERNEL);
> > + return ret;
> > +}
> > +
> > static int qcom_pas_start(struct rproc *rproc)
> > {
> > struct qcom_pas *pas = rproc->priv;
> > @@ -289,11 +306,15 @@ static int qcom_pas_start(struct rproc *rproc)
> > }
> >
> > if (pas->dtb_pas_id) {
> > - ret = qcom_scm_pas_auth_and_reset(pas->dtb_pas_id);
> > + ret = qcom_pas_map_carveout(rproc, pas->dtb_mem_phys, pas->dtb_mem_size);
> > + if (ret)
> > + goto disable_px_supply;
> > +
> > + ret = qcom_scm_pas_prepare_and_auth_reset(pas->dtb_pas_ctx);
> > if (ret) {
> > dev_err(pas->dev,
> > "failed to authenticate dtb image and release reset\n");
> > - goto disable_px_supply;
> > + goto unmap_dtb_carveout;
> > }
> > }
> >
> > @@ -304,18 +325,22 @@ static int qcom_pas_start(struct rproc *rproc)
> >
> > qcom_pil_info_store(pas->info_name, pas->mem_phys, pas->mem_size);
> >
> > - ret = qcom_scm_pas_auth_and_reset(pas->pas_id);
> > + ret = qcom_pas_map_carveout(rproc, pas->mem_phys, pas->mem_size);
> > + if (ret)
> > + goto release_pas_metadata;
> > +
> > + ret = qcom_scm_pas_prepare_and_auth_reset(pas->pas_ctx);
> > if (ret) {
> > dev_err(pas->dev,
> > "failed to authenticate image and release reset\n");
> > - goto release_pas_metadata;
> > + goto unmap_carveout;
> > }
> >
> > ret = qcom_q6v5_wait_for_start(&pas->q6v5, msecs_to_jiffies(5000));
> > if (ret == -ETIMEDOUT) {
> > dev_err(pas->dev, "start timed out\n");
> > qcom_scm_pas_shutdown(pas->pas_id);
> > - goto release_pas_metadata;
> > + goto unmap_carveout;
> > }
> >
> > qcom_scm_pas_metadata_release(pas->pas_ctx);
> > @@ -327,10 +352,16 @@ static int qcom_pas_start(struct rproc *rproc)
> >
> > return 0;
> >
> > +unmap_carveout:
> > + qcom_pas_unmap_carveout(rproc, pas->mem_phys, pas->mem_size);
> > release_pas_metadata:
> > qcom_scm_pas_metadata_release(pas->pas_ctx);
> > if (pas->dtb_pas_id)
> > qcom_scm_pas_metadata_release(pas->dtb_pas_ctx);
> > +
> > +unmap_dtb_carveout:
> > + if (pas->dtb_pas_id)
> > + qcom_pas_unmap_carveout(rproc, pas->dtb_mem_phys, pas->dtb_mem_size);
> > disable_px_supply:
> > if (pas->px_supply)
> > regulator_disable(pas->px_supply);
> > @@ -386,8 +417,12 @@ static int qcom_pas_stop(struct rproc *rproc)
> > ret = qcom_scm_pas_shutdown(pas->dtb_pas_id);
> > if (ret)
> > dev_err(pas->dev, "failed to shutdown dtb: %d\n", ret);
> > +
> > + qcom_pas_unmap_carveout(rproc, pas->dtb_mem_phys, pas->dtb_mem_size);
> > }
> >
> > + qcom_pas_unmap_carveout(rproc, pas->mem_phys, pas->mem_size);
> > +
> > handover = qcom_q6v5_unprepare(&pas->q6v5);
> > if (handover)
> > qcom_pas_handover(&pas->q6v5);
> > @@ -757,6 +792,20 @@ static int qcom_pas_probe(struct platform_device *pdev)
> > return -ENOMEM;
> > }
> >
> > + if (of_property_present(pdev->dev.of_node, "iommus")) {
> > + struct of_phandle_args args;
> > +
> > + ret = of_parse_phandle_with_args(pdev->dev.of_node, "iommus",
> > + "#iommu-cells", 0, &args);
> > + if (ret < 0)
> > + return ret;
> > +
> > + rproc->has_iommu = true;
> > + of_node_put(args.np);
> > + } else {
> > + rproc->has_iommu = false;
>
> Default value is false, is't it?
Thanks, will drop the else part.
>
> - Mani
>
> --
> மணிவண்ணன் சதாசிவம்
--
-Mukesh Ojha
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