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Message-ID: <6429dd8d-d610-4393-9863-b856dcfd0cb0@oss.qualcomm.com>
Date: Wed, 8 Oct 2025 10:30:56 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Jingyi Wang <jingyi.wang@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Taniya Das <taniya.das@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, aiqun.yu@....qualcomm.com,
tingwei.zhang@....qualcomm.com, trilok.soni@....qualcomm.com,
yijie.yang@....qualcomm.com,
Vikash Garodia <vikash.garodia@....qualcomm.com>
Subject: Re: [PATCH 20/20] arm64: dts: qcom: kaanapali: Add iris video node
On 9/25/25 2:17 AM, Jingyi Wang wrote:
> Add DT node for the kaanapali iris video node.
>
> Written with help from Taniya Das(added videocc node).
>
> Signed-off-by: Vikash Garodia <vikash.garodia@....qualcomm.com>
I think you might have lost Vikash's authorship here
[...]
> + videocc: clock-controller@...0000 {
> + compatible = "qcom,kaanapali-videocc";
> + reg = <0x0 0x20f0000 0x0 0x10000>;
> + clocks = <&bi_tcxo_div2>,
> + <&gcc GCC_VIDEO_AHB_CLK>;
> +
> + power-domains = <&rpmhpd RPMHPD_MMCX>,
> + <&rpmhpd RPMHPD_MXC>;
> + required-opps = <&rpmhpd_opp_low_svs>,
> + <&rpmhpd_opp_low_svs>;
I see that the PLLs can operate at LOWSVS_D1 at the same frequencies
as they do at LOWSVS, although they need _SVS to fully stretch their
legs
I think we can do _D1 here? +Taniya?
Konrad
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