linux-kernel - Re: [PATCH v6 0/5] Introduce bitfield and move register macro to rust/kernel/

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Message-Id: <DDCVS7HAHDSN.2X14HAKD13MZI@kernel.org>
Date: Wed, 08 Oct 2025 12:49:54 +0200
From: "Danilo Krummrich" <dakr@...nel.org>
To: "Greg KH" <greg@...ah.com>
Cc: "Joel Fernandes" <joelagnelf@...dia.com>, "Alexandre Courbot"
 <acourbot@...dia.com>, "Yury Norov" <yury.norov@...il.com>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
 "rust-for-linux@...r.kernel.org" <rust-for-linux@...r.kernel.org>,
 "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
 "Alistair Popple" <apopple@...dia.com>, "Miguel Ojeda" <ojeda@...nel.org>,
 "Alex Gaynor" <alex.gaynor@...il.com>, "Boqun Feng" <boqun.feng@...il.com>,
 "Gary Guo" <gary@...yguo.net>, "bjorn3_gh@...tonmail.com"
 <bjorn3_gh@...tonmail.com>, "Benno Lossin" <lossin@...nel.org>, "Andreas
 Hindborg" <a.hindborg@...nel.org>, "Alice Ryhl" <aliceryhl@...gle.com>,
 "Trevor Gross" <tmgross@...ch.edu>, "David Airlie" <airlied@...il.com>,
 "Simona Vetter" <simona@...ll.ch>, "Maarten Lankhorst"
 <maarten.lankhorst@...ux.intel.com>, "Maxime Ripard" <mripard@...nel.org>,
 "Thomas Zimmermann" <tzimmermann@...e.de>, "John Hubbard"
 <jhubbard@...dia.com>, "Timur Tabi" <ttabi@...dia.com>,
 "joel@...lfernandes.org" <joel@...lfernandes.org>, "Elle Rhumsaa"
 <elle@...thered-steel.dev>, "Daniel Almeida"
 <daniel.almeida@...labora.com>, "Andrea Righi" <arighi@...dia.com>,
 "nouveau@...ts.freedesktop.org" <nouveau@...ts.freedesktop.org>
Subject: Re: [PATCH v6 0/5] Introduce bitfield and move register macro to
 rust/kernel/

On Wed Oct 8, 2025 at 12:47 PM CEST, Greg KH wrote:
> On Wed, Oct 08, 2025 at 12:23:40PM +0200, Danilo Krummrich wrote:
>> On Wed Oct 8, 2025 at 1:37 AM CEST, Joel Fernandes wrote:
>> > The Nvidia GPU architecture is little-endian (including MMU structures in VRAM).
>> 
>> Yes, I'm aware (and I'd assume that there is no reason to ever change that).
>> 
>> Just for the complete picture, there's also some endianness switch in the
>> NV_PMC_BOOT_1 register I think?
>> 
>> > All the CPU architectures our drivers support are expected to be little-endian.
>> 
>> Technically, all Rust supported architectures are indeed little-endian.
>
> s390x is supported by rust as a tier2 output:
> 	https://doc.rust-lang.org/beta/rustc/platform-support/s390x-unknown-linux-gnu.html
>
> so there really shouldn't be any reason why that platform couldn't add
> rust support today, right?

That's the one I also had in mind. :)