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Message-ID: <iy7wdlhiavqm5bffyo53rqm636cxyy3xdg463sda6aomgsslkc@j4h6cqtpibkw>
Date: Thu, 9 Oct 2025 14:17:38 -0700
From: Manivannan Sadhasivam <mani@...nel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Cc: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>, Bjorn Andersson <bjorn.andersson@....qualcomm.com>,
Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kwilczynski@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, quic_vbadigan@...cinc.com,
quic_mrana@...cinc.com
Subject: Re: [PATCH v3 2/3] arm64: dts: qcom: sm8750: Add PCIe PHY and
controller node
On Thu, Oct 09, 2025 at 07:42:37PM +0300, Dmitry Baryshkov wrote:
> On Thu, Oct 09, 2025 at 10:35:52AM +0200, Konrad Dybcio wrote:
> > On 10/8/25 9:08 PM, Dmitry Baryshkov wrote:
> > > On Wed, Oct 08, 2025 at 11:11:43AM +0200, Konrad Dybcio wrote:
> > >> On 10/8/25 10:00 AM, Konrad Dybcio wrote:
> > >>> On 10/8/25 6:41 AM, Krishna Chaitanya Chundru wrote:
> > >>>>
> > >>>>
> > >>>> On 10/2/2025 5:07 AM, Bjorn Andersson wrote:
> > >>>>> On Tue, Aug 26, 2025 at 04:32:54PM +0530, Krishna Chaitanya Chundru wrote:
> > >>>>>> Add PCIe controller and PHY nodes which supports data rates of 8GT/s
> > >>>>>> and x2 lane.
> > >>>>>>
> > >>>>>
> > >>>>> I tried to boot the upstream kernel (next-20250925 defconfig) on my
> > >>>>> Pakala MTP with latest LA1.0 META and unless I disable &pcie0 the device
> > >>>>> is crashing during boot as PCIe is being probed.
> > >>>>>
> > >>>>> Is this a known problem? Is there any workaround/changes in flight that
> > >>>>> I'm missing?
> > >>>>>
> > >>>> Hi Bjorn,
> > >>>>
> > >>>> we need this fix for the PCIe to work properly. Please try it once.
> > >>>> https://lore.kernel.org/all/20251008-sm8750-v1-1-daeadfcae980@oss.qualcomm.com/
> > >>>
> > >>> This surely shouldn't cause/fix any issues, no?
> > >>
> > >> Apparently this is a real fix, because sm8750.dtsi defines the PCIe
> > >> PHY under a port node, while the MTP DT assigns perst-gpios to the RC
> > >> node, which the legacy binding ("everything under the RC node") parsing
> > >> code can't cope with (please mention that in the commit message, Krishna)
> > >>
> > >> And I couldn't come up with a way to describe "either both are required
> > >> if any is present under the RC node or none are allowed" in yaml
> > >
> > > What about:
> > >
> > > oneOf:
> > > - required:
> > > - foo
> > > - bar
> > > - properties:
> > > foo: false
> > > bar: false
> >
> > Oh yeah, this works.. would you mind submitting a patch like this, with a
>
> I'd prefer it it comes from somebody who is actually working on PCIe so
> that the explanations are not ridiculous. Mani?
>
Will do.
- Mani
--
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