linux-kernel - Re: [PATCH 0/5] Add separate ICE UFS and eMMC device nodes for QCS615 platform

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <176004726840.3398717.5566698340633844509.robh@kernel.org>
Date: Thu, 09 Oct 2025 17:03:43 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
Cc: linux-arm-msm@...r.kernel.org, linux-crypto@...r.kernel.org, 
 linux-mmc@...r.kernel.org, Konrad Dybcio <konradybcio@...nel.org>, 
 Bjorn Andersson <andersson@...nel.org>, devicetree@...r.kernel.org, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Ulf Hansson <ulf.hansson@...aro.org>, 
 "David S. Miller" <davem@...emloft.net>, 
 Herbert Xu <herbert@...dor.apana.org.au>, linux-kernel@...r.kernel.org, 
 Conor Dooley <conor+dt@...nel.org>
Subject: Re: [PATCH 0/5] Add separate ICE UFS and eMMC device nodes for
 QCS615 platform


On Thu, 09 Oct 2025 11:48:50 +0530, Abhinaba Rakshit wrote:
> This patch series introduces support for representing the Inline Crypto Engine (ICE)
> as separate device nodes for both UFS and eMMC on the QCS615 platform.
> Previously, ICE functionality was implicitly tied to the UFS/eMMC controllers.
> With this update, ICE is modeled as an independent hardware block, allowing its
> clock and frequency configuration to be managed directly by the ICE driver.
> This separation improves modularity, aligns with hardware architecture.
> 
> The change allows the MMC/UFS controller to link to the ICE node for
> crypto operations without embedding ICE-specific properties directly
> in the MMC nodes.
> 
> Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
> ---
> Abhinaba Rakshit (5):
>       dt-bindings: mmc: add qcom,ice phandle to mmc
>       dt-bindings: crypto: ice: add freq-table-hz property to ICE schema
>       dt-bindings: crypto: ice: document the qcs615 inline crypto engine
>       arm64: dts: qcom: qcs615: add ufs and emmc inline crypto engine nodes
>       dts: qcom: qcs615-ride: Enable ice ufs and emmc
> 
>  .../bindings/crypto/qcom,inline-crypto-engine.yaml |  7 +++
>  .../devicetree/bindings/mmc/sdhci-msm.yaml         |  4 ++
>  arch/arm64/boot/dts/qcom/qcs615-ride.dts           |  8 ++++
>  arch/arm64/boot/dts/qcom/sm6150.dtsi               | 51 +++++++++++++---------
>  4 files changed, 49 insertions(+), 21 deletions(-)
> ---
> base-commit: 47a8d4b89844f5974f634b4189a39d5ccbacd81c
> change-id: 20251006-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-83ebc37bdddc
> 
> Best regards,
> --
> Abhinaba Rakshit <abhinaba.rakshit@....qualcomm.com>
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


This patch series was applied (using b4) to base:
 Base: 47a8d4b89844f5974f634b4189a39d5ccbacd81c (use --merge-base to override)

If this is not the correct base, please add 'base-commit' tag
(or use b4 which does this automatically)

New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20251009-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-v1-0-2a34d8d03c72@....qualcomm.com:

arch/arm64/boot/dts/qcom/qcs615-ride.dtb: ufshc@...4000 (qcom,qcs615-ufshc): clock-names: ['core_clk', 'bus_aggr_clk', 'iface_clk', 'core_clk_unipro', 'ref_clk', 'tx_lane0_sync_clk', 'rx_lane0_sync_clk'] is too short
	from schema $id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#
arch/arm64/boot/dts/qcom/qcs615-ride.dtb: ufshc@...4000 (qcom,qcs615-ufshc): clocks: [[46, 126], [46, 10], [46, 125], [46, 134], [44, 0], [46, 133], [46, 132]] is too short
	from schema $id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#
arch/arm64/boot/dts/qcom/qcs615-ride.dtb: ufshc@...4000 (qcom,qcs615-ufshc): reg: [[0, 30949376, 0, 12288]] is too short
	from schema $id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#
arch/arm64/boot/dts/qcom/qcs615-ride.dtb: ufshc@...4000 (qcom,qcs615-ufshc): reg-names: ['std'] is too short
	from schema $id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#
arch/arm64/boot/dts/qcom/qcs615-ride.dtb: ufshc@...4000 (qcom,qcs615-ufshc): reg-names: ['std'] is too short
	from schema $id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#
arch/arm64/boot/dts/qcom/qcs615-ride.dtb: ufshc@...4000 (qcom,qcs615-ufshc): Unevaluated properties are not allowed ('reg-names' was unexpected)
	from schema $id: http://devicetree.org/schemas/ufs/qcom,ufs.yaml#