linux-kernel - Re: [PATCH 22/24] arm64: dts: qcom: glymur: Add display clock controller device

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Message-ID: <8465759d-8d50-48c6-b5e9-26e08045304c@oss.qualcomm.com>
Date: Thu, 9 Oct 2025 10:42:14 +0530
From: Taniya Das <taniya.das@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Pankaj Patil <pankaj.patil@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 22/24] arm64: dts: qcom: glymur: Add display clock
 controller device



On 9/29/2025 9:24 AM, Taniya Das wrote:
> 
> 
> On 9/25/2025 4:03 PM, Konrad Dybcio wrote:
>> On 9/25/25 8:32 AM, Pankaj Patil wrote:
>>> From: Taniya Das <taniya.das@....qualcomm.com>
>>>
>>> Support the display clock controller for GLYMUR SoC.
>>>
>>> Signed-off-by: Taniya Das <taniya.das@....qualcomm.com>
>>> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
>>> ---
>>
>> [...]
>>
>>> +		dispcc: clock-controller@...0000 {
>>> +			compatible = "qcom,glymur-dispcc";
>>> +			reg = <0 0x0af00000 0 0x20000>;
>>> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
>>> +				 <&sleep_clk>,
>>> +				 <0>, /* dp0 */
>>> +				 <0>,
>>> +				 <0>, /* dp1 */
>>> +				 <0>,
>>> +				 <0>, /* dp2 */
>>> +				 <0>,
>>> +				 <0>, /* dp3 */
>>> +				 <0>,
>>> +				 <0>, /* dsi0 */
>>> +				 <0>,
>>> +				 <0>, /* dsi1 */
>>> +				 <0>,
>>> +				 <0>,
>>> +				 <0>,
>>> +				 <0>,
>>> +				 <0>;
>>> +			power-domains = <&rpmhpd RPMHPD_MMCX>;
>>> +			required-opps = <&rpmhpd_opp_turbo>;
> 
> The SVS level didn't work when Abel tried out. I will check with Abel again.
> 

Abel offline confirmed LOW SVS level worked for him and I will update
the level to use "rpmhpd_opp_low_svs".

>>
>> Really odd!
>>
>> Konrad
> 

-- 
Thanks,
Taniya Das