linux-kernel - Re: [PATCH v4 3/3] RISC-V: Add support for srmcfg CSR from Ssqosid ext

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Message-Id: <DDDL94HT7HYF.3VU2WQYU4WZY5@ventanamicro.com>
Date: Thu, 09 Oct 2025 08:47:27 +0200
From: Radim Krčmář <rkrcmar@...tanamicro.com>
To: "Drew Fustini" <fustini@...nel.org>
Cc: "Paul Walmsley" <paul.walmsley@...ive.com>, "Palmer Dabbelt"
 <palmer@...belt.com>, "Albert Ou" <aou@...s.berkeley.edu>, "Alexandre
 Ghiti" <alex@...ti.fr>, "Conor Dooley" <conor@...nel.org>, "Rob Herring"
 <robh@...nel.org>, "Krzysztof Kozlowski" <krzk+dt@...nel.org>, "Conor
 Dooley" <conor+dt@...nel.org>, Kornel Dulęba
 <mindal@...ihalf.com>, "Adrien Ricciardi" <aricciardi@...libre.com>, "James
 Morse" <james.morse@....com>, "Atish Kumar Patra" <atishp@...osinc.com>,
 "Atish Patra" <atish.patra@...ux.dev>, "Vasudevan Srinivasan"
 <vasu@...osinc.com>, "Conor Dooley" <conor.dooley@...rochip.com>,
 <guo.wenjia23@....com.cn>, <liu.qingtao2@....com.cn>,
 <linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
 <devicetree@...r.kernel.org>, "linux-riscv"
 <linux-riscv-bounces@...ts.infradead.org>
Subject: Re: [PATCH v4 3/3] RISC-V: Add support for srmcfg CSR from Ssqosid
 ext

2025-10-07T23:21:12-07:00, Drew Fustini <fustini@...nel.org>:
> diff --git a/arch/riscv/include/asm/qos.h b/arch/riscv/include/asm/qos.h
> +static inline void __switch_to_srmcfg(struct task_struct *next)
> +{
> +	u32 *cpu_srmcfg_ptr = this_cpu_ptr(&cpu_srmcfg);
> +	u32 thread_srmcfg;
> +
> +	thread_srmcfg = READ_ONCE(next->thread.srmcfg);
> +
> +	if (thread_srmcfg != *cpu_srmcfg_ptr) {

Wouldn't prev->thread.srmcfg have the value of CSR_SRMCFG when executing
switch_to?

Thanks.

> +		*cpu_srmcfg_ptr = thread_srmcfg;
> +		csr_write(CSR_SRMCFG, thread_srmcfg);
> +	}
> +}