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Message-Id: <20251009071127.26026-6-quic_riteshk@quicinc.com>
Date: Thu, 9 Oct 2025 12:41:27 +0530
From: Ritesh Kumar <quic_riteshk@...cinc.com>
To: robin.clark@....qualcomm.com, lumag@...nel.org, abhinav.kumar@...ux.dev,
jessica.zhang@....qualcomm.com, sean@...rly.run,
marijn.suijten@...ainline.org, maarten.lankhorst@...ux.intel.com,
mripard@...nel.org, tzimmermann@...e.de, airlied@...il.com,
simona@...ll.ch, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, quic_mahap@...cinc.com, andersson@...nel.org,
konradybcio@...nel.org, mani@...nel.org,
James.Bottomley@...senPartnership.com, martin.petersen@...cle.com,
vkoul@...nel.org, kishon@...nel.org,
cros-qcom-dts-watchers@...omium.org
Cc: Ritesh Kumar <quic_riteshk@...cinc.com>, linux-phy@...ts.infradead.org,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-scsi@...r.kernel.org,
quic_vproddut@...cinc.com
Subject: [PATCH 5/5] arm64: dts: qcom: Add edp reference clock for edp phy
Define edp reference clock as fixed clock and add it for
edp phy on sc8180x and sc8280xp chipsets.
Signed-off-by: Ritesh Kumar <quic_riteshk@...cinc.com>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 11 ++++++--
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 36 +++++++++++++++++---------
2 files changed, 33 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 85c2afcb417d..392cc9eede48 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -27,6 +27,12 @@
#size-cells = <2>;
clocks {
+ edp_ref_clk: edp-ref-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <19200000>;
+ };
+
xo_board_clk: xo-board {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -3492,8 +3498,9 @@
<0 0x0aec2000 0 0x19c>;
clocks = <&dispcc DISP_CC_MDSS_EDP_AUX_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>;
- clock-names = "aux", "cfg_ahb";
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&edp_ref_clk>;
+ clock-names = "aux", "cfg_ahb", "edp_ref";
power-domains = <&rpmhpd SC8180X_MX>;
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 279e5e6beae2..d0a976aea46d 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -29,6 +29,12 @@
#size-cells = <2>;
clocks {
+ edp_ref_clk: edp-ref-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <19200000>;
+ };
+
xo_board_clk: xo-board-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -3792,8 +3798,9 @@
<0 0x08909000 0 0x1c8>;
clocks = <&dispcc1 DISP_CC_MDSS_DPTX0_AUX_CLK>,
- <&dispcc1 DISP_CC_MDSS_AHB_CLK>;
- clock-names = "aux", "cfg_ahb";
+ <&dispcc1 DISP_CC_MDSS_AHB_CLK>,
+ <&edp_ref_clk>;
+ clock-names = "aux", "cfg_ahb", "edp_ref";
power-domains = <&rpmhpd SC8280XP_MX>;
#clock-cells = <1>;
@@ -3810,8 +3817,9 @@
<0 0x0890c000 0 0x1c8>;
clocks = <&dispcc1 DISP_CC_MDSS_DPTX1_AUX_CLK>,
- <&dispcc1 DISP_CC_MDSS_AHB_CLK>;
- clock-names = "aux", "cfg_ahb";
+ <&dispcc1 DISP_CC_MDSS_AHB_CLK>,
+ <&edp_ref_clk>;
+ clock-names = "aux", "cfg_ahb", "edp_ref";
power-domains = <&rpmhpd SC8280XP_MX>;
#clock-cells = <1>;
@@ -5022,8 +5030,9 @@
<0 0x0aec2000 0 0x1c8>;
clocks = <&dispcc0 DISP_CC_MDSS_DPTX2_AUX_CLK>,
- <&dispcc0 DISP_CC_MDSS_AHB_CLK>;
- clock-names = "aux", "cfg_ahb";
+ <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
+ <&edp_ref_clk>;
+ clock-names = "aux", "cfg_ahb", "edp_ref";
power-domains = <&rpmhpd SC8280XP_MX>;
#clock-cells = <1>;
@@ -5040,8 +5049,9 @@
<0 0x0aec5000 0 0x1c8>;
clocks = <&dispcc0 DISP_CC_MDSS_DPTX3_AUX_CLK>,
- <&dispcc0 DISP_CC_MDSS_AHB_CLK>;
- clock-names = "aux", "cfg_ahb";
+ <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
+ <&edp_ref_clk>;
+ clock-names = "aux", "cfg_ahb", "edp_ref";
power-domains = <&rpmhpd SC8280XP_MX>;
#clock-cells = <1>;
@@ -6368,8 +6378,9 @@
<0 0x220c2000 0 0x1c8>;
clocks = <&dispcc1 DISP_CC_MDSS_DPTX2_AUX_CLK>,
- <&dispcc1 DISP_CC_MDSS_AHB_CLK>;
- clock-names = "aux", "cfg_ahb";
+ <&dispcc1 DISP_CC_MDSS_AHB_CLK>,
+ <&edp_ref_clk>;
+ clock-names = "aux", "cfg_ahb", "edp_ref";
power-domains = <&rpmhpd SC8280XP_MX>;
#clock-cells = <1>;
@@ -6386,8 +6397,9 @@
<0 0x220c5000 0 0x1c8>;
clocks = <&dispcc1 DISP_CC_MDSS_DPTX3_AUX_CLK>,
- <&dispcc1 DISP_CC_MDSS_AHB_CLK>;
- clock-names = "aux", "cfg_ahb";
+ <&dispcc1 DISP_CC_MDSS_AHB_CLK>,
+ <&edp_ref_clk>;
+ clock-names = "aux", "cfg_ahb", "edp_ref";
power-domains = <&rpmhpd SC8280XP_MX>;
#clock-cells = <1>;
--
2.17.1
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