lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <aOd1CMMZRGSqkSLH@swlinux02>
Date: Thu, 9 Oct 2025 16:40:40 +0800
From: CL Wang <cl634@...estech.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, <conor@...nel.org>
CC: <vkoul@...nel.org>, <dmaengine@...r.kernel.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <tim609@...estech.com>, <cl634@...estech.com>
Subject: Re: [PATCH V1 1/2] dt-bindings: dmaengine: Add support for
 ATCDMAC300 DMA engine

Hi Krzysztof and Conor,

Thanks for the feedback — both comments are very helpful.

After considering the binding guidelines and your points, I will update the
binding to use only the SoC-specific compatible string.

To clarify, the DMA controller used in the Qilai SoC is based on the ATCDMAC300
IP core. Following your suggestion, I plan to use only the SoC-specific
compatible string as shown below:

properties:
  compatible:
    const: andestech,qilai-dma

I can prepare a v2 patch if this SoC-specific compatible string looks fine to you.

Best regards,
CL

On Thu, Oct 09, 2025 at 08:48:00AM +0900, Krzysztof Kozlowski wrote:
> [EXTERNAL MAIL]
> 
> On 08/10/2025 22:35, CL Wang wrote:
> > Hi Krzysztof,
> >
> > Thanks for the clarification, and sorry for the earlier confusion.
> >
> > To elaborate on the rationale:
> > "andestech,atcdmac300" is the IP core name of the DMA controller, which serves
> > as a generic fallback compatible shared across multiple Andes SoCs.
> >
> > Primary compatible (SoC-specific):
> > andestech,qilai-dma refers to the DMA controller instance implemented on the
> > Qilai SoC, following the SoC-specific recommendation.
> >
> > Fallback compatible (IP-core specific):
> > andestech,atcdmac300 represents the reusable IP block used across different
> > Andes SoCs that share the same register map and programming model.
> >
> > Keeping andestech,atcdmac300 as a fallback helps avoid code duplication and
> > allows a single driver to support future SoCs using the same hardware IP.
> 
> No, it helps in nothing.
> 
> 
> >
> > This approach follows the DeviceTree binding guideline:
> >
> > “DO use a SoC-specific compatible for all SoC devices, followed by a fallback
> > if appropriate. SoC-specific compatibles are also preferred for the fallbacks.”
> 
> No, it does not. You just ignored completely last sentence.
> 
> 
> Best regards,
> Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ