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Message-ID: <dc04ae37-7707-4d32-8b01-f4804cd0cd90@collabora.com>
Date: Thu, 9 Oct 2025 13:56:41 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Jason-JH Lin <jason-jh.lin@...iatek.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Jassi Brar <jassisinghbrar@...il.com>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>
Cc: Matthias Brugger <matthias.bgg@...il.com>,
Nicolas Dufresne <nicolas@...fresne.ca>, Nancy Lin <nancy.lin@...iatek.com>,
Singo Chang <singo.chang@...iatek.com>,
Paul-PL Chen <paul-pl.chen@...iatek.com>, Moudy Ho <moudy.ho@...iatek.com>,
Xiandong Wang <xiandong.wang@...iatek.com>,
Sirius Wang <sirius.wang@...iatek.com>, Fei Shao <fshao@...omium.org>,
Chen-yu Tsai <wenst@...omium.org>,
Project_Global_Chrome_Upstream_Group@...iatek.com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org, linux-mediatek@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-media@...r.kernel.org
Subject: Re: [PATCH v7 11/20] soc: mediatek: mtk-cmdq: Add mminfra_offset
adjustment for DRAM addresses
Il 27/08/25 13:37, Jason-JH Lin ha scritto:
> Since GCE has been moved to MMINFRA in MT8196, all transactions from
> MMINFRA to DRAM will have their addresses adjusted by subtracting a
> mminfra_offset.
>
> Therefore, the CMDQ helper driver needs to get the mminfra_offset value
> of the SoC from cmdq_mbox_priv of cmdq_pkt and then add it to the DRAM
> address when generating instructions to ensure GCE accesses the correct
> DRAM address. CMDQ users can then call CMDQ helper APIs as usual.
>
> Signed-off-by: Jason-JH Lin <jason-jh.lin@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
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