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Message-ID: <831f6fd7-b81f-4d6f-b9bd-5a8fe514befb@oss.qualcomm.com>
Date: Thu, 9 Oct 2025 19:24:13 +0530
From: Jishnu Prakash <jishnu.prakash@....qualcomm.com>
To: Eugen Hristev <eugen.hristev@...aro.org>,
Jingyi Wang <jingyi.wang@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, aiqun.yu@....qualcomm.com,
tingwei.zhang@....qualcomm.com, trilok.soni@....qualcomm.com,
yijie.yang@....qualcomm.com
Subject: Re: [PATCH 14/20] arm64: dts: qcom: kaanapali-mtp: Enable more
features
Hi Eugen,
On 9/25/2025 1:33 PM, Eugen Hristev wrote:
>
>
> On 9/25/25 03:17, Jingyi Wang wrote:
>> Enable more features on Kaanapali MTP boards including PMIC peripherals,
>> bus, SDHCI, remoteprocs, USB, PCIE, WLAN and Bluetooth.
>>
>> Written with help from Jyothi Kumar Seerapu(added bus), Ronak Raheja
>> (added USB), Manish Pandey(added SDHCI), Jishnu Prakash(added PMIC),
>> Qiang Yu(added PCIE), Yijie Yang(Added WLAN) and Zijun Hu(Added Bluetooth).
>>
>> Signed-off-by: Jingyi Wang <jingyi.wang@....qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/kaanapali-mtp.dts | 663 +++++++++++++++++++++++++++++
>> 1 file changed, 663 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts b/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts
>> index 9cf3158e2712..2949579481a9 100644
>> --- a/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts
>> +++ b/arch/arm64/boot/dts/qcom/kaanapali-mtp.dts
>> @@ -5,9 +5,23 @@
>>
...
>> +
>> +&spmi_bus1 {
>> + pmd8028: pmic@4 {
>> + compatible = "qcom,pmd8028", "qcom,spmi-pmic";
>> + reg = <0x4 SPMI_USID>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + pmd8028_temp_alarm: temp-alarm@a00 {
>> + compatible = "qcom,spmi-temp-alarm";
>> + reg = <0xa00>;
>> + interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
>> + #thermal-sensor-cells = <0>;
>> + };
>> +
>> + pmd8028_gpios: gpio@...0 {
>> + compatible = "qcom,pmd8028-gpio", "qcom,spmi-gpio";
>> + reg = <0x8800>;
>> + gpio-controller;
>> + gpio-ranges = <&pmd8028_gpios 0 0 4>;
>> + #gpio-cells = <2>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> + };
>> +
>> + pmih0108: pmic@7 {
>> + compatible = "qcom,pmih0108", "qcom,spmi-pmic";
>> + reg = <0x7 SPMI_USID>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + pmih0108_temp_alarm: temp-alarm@a00 {
>> + compatible = "qcom,spmi-temp-alarm";
>> + reg = <0xa00>;
>> + interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
>> + #thermal-sensor-cells = <0>;
>> + };
>> +
>> + pmih0108_gpios: gpio@...0 {
>> + compatible = "qcom,pmih0108-gpio", "qcom,spmi-gpio";
>> + reg = <0x8800>;
>> + gpio-controller;
>> + gpio-ranges = <&pmih0108_gpios 0 0 18>;
>> + #gpio-cells = <2>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + pmih0108_eusb2_repeater: phy@...0 {
>> + compatible = "qcom,pm8550b-eusb2-repeater";
>> + reg = <0xfd00>;
>> + #phy-cells = <0>;
>> + vdd18-supply = <&vreg_l15b_1p8>;
>> + vdd3-supply = <&vreg_l5b_3p1>;
>> + };
>> + };
>> +
>> + pmr735d: pmic@a {
>
> Hi,
>
> The PMR735D is available in pmr735d_a.dtsi
>
> Can we find a way to reuse that include file instead of duplicating it
> here ?
In pmr735d_a.dtsi, the peripherals are added under the parent phandle
"spmi_bus", which was commonly used in older SoCs having only a single
bus under the PMIC arbiter, but in Kaanapali, there are two buses
present under the PMIC arbiter, with phandles "spmi_bus0" and "spmi_bus1",
so we cannot include the file as it is.
Thanks,
Jishnu
>
>> + compatible = "qcom,pmr735d", "qcom,spmi-pmic";
>> + reg = <0xa SPMI_USID>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + pmr735d_temp_alarm: temp-alarm@a00 {
>> + compatible = "qcom,spmi-temp-alarm";
>> + reg = <0xa00>;
>> + interrupts = <0xa 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
>> + #thermal-sensor-cells = <0>;
>> + };
>> +
>> + pmr735d_gpios: gpio@...0 {
>> + compatible = "qcom,pmr735d-gpio", "qcom,spmi-gpio";
>> + reg = <0x8800>;
>> + gpio-controller;
>> + gpio-ranges = <&pmr735d_gpios 0 0 2>;
>> + #gpio-cells = <2>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> + };
>> +
>
>
> [...]
>
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