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Message-ID: <20251013152645.1119308-4-richard.genoud@bootlin.com>
Date: Mon, 13 Oct 2025 17:26:33 +0200
From: Richard Genoud <richard.genoud@...tlin.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>
Cc: Uwe Kleine-König <u.kleine-koenig@...libre.com>,
Wentao Liang <vulab@...as.ac.cn>,
Johan Hovold <johan@...nel.org>,
Maxime Ripard <mripard@...nel.org>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
linux-mtd@...ts.infradead.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Richard Genoud <richard.genoud@...tlin.com>
Subject: [PATCH v2 03/15] mtd: rawnand: sunxi: introduce reg_ecc_err_cnt in sunxi_nfc_caps
The H6/H616 ECC_ERR_CNT register is not at the same offset as the
A10/A23 one, so move its offset into sunxi_nfc_caps
No functional change.
Signed-off-by: Richard Genoud <richard.genoud@...tlin.com>
---
drivers/mtd/nand/raw/sunxi_nand.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index d3b17d54f04c..0285e4d0ca7f 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -46,7 +46,8 @@
#define NFC_REG_ECC_CTL 0x0034
#define NFC_REG_ECC_ST 0x0038
#define NFC_REG_DEBUG 0x003C
-#define NFC_REG_ECC_ERR_CNT(x) ((0x0040 + (x)) & ~0x3)
+#define NFC_REG_A10_ECC_ERR_CNT 0x0040
+#define NFC_REG_ECC_ERR_CNT(nfc, x) ((nfc->caps->reg_ecc_err_cnt + (x)) & ~0x3)
#define NFC_REG_USER_DATA(x) (0x0050 + ((x) * 4))
#define NFC_REG_SPARE_AREA 0x00A0
#define NFC_REG_PAT_ID 0x00A4
@@ -212,6 +213,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
* @has_mdma: Use mbus dma mode, otherwise general dma
* through MBUS on A23/A33 needs extra configuration.
* @reg_io_data: I/O data register
+ * @reg_ecc_err_cnt: ECC error counter register
* @dma_maxburst: DMA maxburst
* @ecc_strengths: Available ECC strengths array
* @nstrengths: Size of @ecc_strengths
@@ -219,6 +221,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
struct sunxi_nfc_caps {
bool has_mdma;
unsigned int reg_io_data;
+ unsigned int reg_ecc_err_cnt;
unsigned int dma_maxburst;
const u8 *ecc_strengths;
unsigned int nstrengths;
@@ -790,7 +793,7 @@ static int sunxi_nfc_hw_ecc_correct(struct nand_chip *nand, u8 *data, u8 *oob,
return 0;
}
- tmp = readl(nfc->regs + NFC_REG_ECC_ERR_CNT(step));
+ tmp = readl(nfc->regs + NFC_REG_ECC_ERR_CNT(nfc, step));
return NFC_ECC_ERR_CNT(step, tmp);
}
@@ -2177,6 +2180,7 @@ static const u8 sunxi_ecc_strengths_a10[] = {
static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
.reg_io_data = NFC_REG_A10_IO_DATA,
+ .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
.dma_maxburst = 4,
.ecc_strengths = sunxi_ecc_strengths_a10,
.nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
@@ -2185,6 +2189,7 @@ static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
static const struct sunxi_nfc_caps sunxi_nfc_a23_caps = {
.has_mdma = true,
.reg_io_data = NFC_REG_A23_IO_DATA,
+ .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
.dma_maxburst = 8,
.ecc_strengths = sunxi_ecc_strengths_a10,
.nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
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