linux-kernel - Re: [PATCH] riscv: Add pgprot

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Message-ID: <CAK9=C2XT1S=nb5LPVUJ=_2NtHjx1ABrwzjv2G_edYzFi46bA+Q@mail.gmail.com>
Date: Mon, 13 Oct 2025 09:09:14 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Guo Ren <guoren@...nel.org>
Cc: samuel.holland@...ive.com, david@...hat.com, yongxuan.wang@...ive.com, 
	cuiyunhui@...edance.com, luxu.kernel@...edance.com, paul.walmsley@...ive.com, 
	aou@...s.berkeley.edu, alex@...ti.fr, palmer@...belt.com, 
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] riscv: Add pgprot_dmacoherent definition

On Mon, Oct 13, 2025 at 6:00 AM Guo Ren <guoren@...nel.org> wrote:
>
> On Mon, Oct 13, 2025 at 7:50 AM Guo Ren <guoren@...nel.org> wrote:
> >
> > On Sun, Oct 12, 2025 at 11:51 PM Anup Patel <apatel@...tanamicro.com> wrote:
> > >
> > > On Sat, Oct 11, 2025 at 9:28 PM <guoren@...nel.org> wrote:
> > > >
> > > > From: "Guo Ren (Alibaba DAMO Academy)" <guoren@...nel.org>
> > > >
> > > > RISC-V Svpbmt Standard Extension for Page-Based Memory Types
> > > > defines three modes:
> > > >
> > > >  Mode | Value | Requested Memory Attributes
> > > >  PMA  |   0   | None
> > > >  NC   |   1   | Non-cacheable, idempotent, weakly-ordered (RVWMO),
> > > >       |       | main memory
> > > >  IO   |   2   | Non-cacheable, non-idempotent, strongly-ordered
> > > >       |       | (I/O ordering), I/O
> > > >
> > > > The pgprot_dmacoherent default uses the IO memory attribute if there
> > > > is no asm definition, but IO is not for main memory according to
> > > > Svpbmt rules.
> > > >
> > > > This commit corrects pgprot_dmacoherent with the NC memory attribute,
> > > > which satisfies performance improvement and prevents using the IO
> > > > attribute to access main memory.
> > > >
> > > > Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@...nel.org>
> > >
> > > I had sent the same patch on Aug 20 and you had provided
> > > Tested-by to that patch.
> > >
> > > If you had concerns with my patch then you could have provided
> > > comments but you choose to hijack it and change authorship.
> > I didn't find your patch at first, so I sent it out. When I discovered
> > your patch, I gave the Tested-by to yours.
> > I've added the abandoned reply to this thread. Have you seen that [1]?
> >
> > [1] https://lore.kernel.org/all/CAJF2gTRfLzrqHoYrexS55AT3sjn5VbbNKf2WMEGWrw9ERRLYYA@mail.gmail.com/
>
> This patch is on Sat, Oct 11, 2025 [1]
> Guo's Tested-by is on Sun, 12 Oct 2025 02:07:34 [2]
> Abandon reply is on Sun, 12 Oct 2025 14:11:42 [3]
> Gao's Tested-by is on Sun, 12 Oct 2025 18:00:36 [4]
>
> [1]: https://lore.kernel.org/all/20251011155746.1558731-1-guoren@kernel.org/
> [2]: https://lore.kernel.org/linux-riscv/aOtR39pl5xjyYHn1@gmail.com/
> [3]: https://lore.kernel.org/all/CAJF2gTRfLzrqHoYrexS55AT3sjn5VbbNKf2WMEGWrw9ERRLYYA@mail.gmail.com/
> [4]: https://lore.kernel.org/linux-riscv/031395FE-C51C-45A7-85A3-CC4A25EB6066@gmail.com/
>
> I also asked Gao to notice your patch and give it the Tested-by tag.
> That's why you got two Tested-by on Oct 12 after two months. So, your
> reply, "but you choose to hijack it and change authorship," makes me
> sad.

Please have better coordination among yourselves before
sending out patches.

It makes me sad when people blindly send patches without
noticing existing or on-going work. Sometimes it also happens
that people are already working on things which they have
announced in the appropriate RISE WG or RVI TG/SIG.

--
Anup