[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20251013-automatic-clocks-v1-6-72851ee00300@linaro.org>
Date: Mon, 13 Oct 2025 21:51:35 +0100
From: Peter Griffin <peter.griffin@...aro.org>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
André Draszik <andre.draszik@...aro.org>,
Tudor Ambarus <tudor.ambarus@...aro.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Sam Protsenko <semen.protsenko@...aro.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>
Cc: Will McVicker <willmcvicker@...gle.com>,
Krzysztof Kozlowski <krzk@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
kernel-team@...roid.com, Peter Griffin <peter.griffin@...aro.org>
Subject: [PATCH 6/9] arm64: dts: exynos: gs101: add samsung,sysreg property
to CMU nodes
Each CMU (with the exception of cmu_top) should have a phandle to its
simarlarly named sysreg controller.
Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index ab66c055e0ac157f89a0e034f15bbe84e20a7e82..c54468ddbb02b170ec79d56ba2460f2ffb0dc40d 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -293,6 +293,7 @@ cmu_misc: clock-controller@...10000 {
clocks = <&cmu_top CLK_DOUT_CMU_MISC_BUS>,
<&cmu_top CLK_DOUT_CMU_MISC_SSS>;
clock-names = "bus", "sss";
+ samsung,sysreg = <&sysreg_misc>;
};
sysreg_misc: syscon@...30000 {
@@ -377,6 +378,7 @@ cmu_peric0: clock-controller@...00000 {
<&cmu_top CLK_DOUT_CMU_PERIC0_BUS>,
<&cmu_top CLK_DOUT_CMU_PERIC0_IP>;
clock-names = "oscclk", "bus", "ip";
+ samsung,sysreg = <&sysreg_peric0>;
};
sysreg_peric0: syscon@...20000 {
@@ -923,6 +925,7 @@ cmu_peric1: clock-controller@...00000 {
<&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
<&cmu_top CLK_DOUT_CMU_PERIC1_IP>;
clock-names = "oscclk", "bus", "ip";
+ samsung,sysreg = <&sysreg_peric1>;
};
sysreg_peric1: syscon@...20000 {
@@ -1281,6 +1284,7 @@ cmu_hsi0: clock-controller@...00000 {
<&cmu_top CLK_DOUT_CMU_HSI0_USBDPDBG>;
clock-names = "oscclk", "bus", "dpgtc", "usb31drd",
"usbdpdbg";
+ samsung,sysreg = <&sysreg_hsi0>;
};
sysreg_hsi0: syscon@...20000 {
@@ -1352,6 +1356,7 @@ cmu_hsi2: clock-controller@...00000 {
<&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
<&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
+ samsung,sysreg = <&sysreg_hsi2>;
};
sysreg_hsi2: syscon@...20000 {
@@ -1412,6 +1417,7 @@ cmu_apm: clock-controller@...00000 {
clocks = <&ext_24_5m>;
clock-names = "oscclk";
+ samsung,sysreg = <&sysreg_apm>;
};
sysreg_apm: syscon@...20000 {
--
2.51.0.760.g7b8bcc2412-goog
Powered by blists - more mailing lists