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Message-ID: <CAD=FV=XRp9=5yxR3Q1UhJhBS-wm59yssozKi55W7HGk+S94AjQ@mail.gmail.com>
Date: Mon, 13 Oct 2025 15:35:16 -0700
From: Doug Anderson <dianders@...omium.org>
To: Yunhui Cui <cuiyunhui@...edance.com>
Cc: akpm@...ux-foundation.org, alex@...ti.fr, anup@...infault.org,
aou@...s.berkeley.edu, atish.patra@...ux.dev, catalin.marinas@....com,
johannes@...solutions.net, lihuafei1@...wei.com, mark.rutland@....com,
masahiroy@...nel.org, maz@...nel.org, mingo@...nel.org,
nicolas.schier@...ux.dev, palmer@...belt.com, paul.walmsley@...ive.com,
suzuki.poulose@....com, thorsten.blum@...ux.dev, wangjinchao600@...il.com,
will@...nel.org, yangyicong@...ilicon.com, zhanjie9@...ilicon.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v3 2/2] riscv: add HARDLOCKUP_DETECTOR_PERF support
Hi,
On Wed, Oct 8, 2025 at 8:29 PM Yunhui Cui <cuiyunhui@...edance.com> wrote:
>
> Enable the HARDLOCKUP_DETECTOR_PERF function based on RISC-V SSE.
>
> Signed-off-by: Yunhui Cui <cuiyunhui@...edance.com>
> ---
> arch/riscv/Kconfig | 4 ++++
> drivers/perf/riscv_pmu_sbi.c | 10 ++++++++++
> 2 files changed, 14 insertions(+)
Reviewed-by: Douglas Anderson <dianders@...omium.org>
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