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Message-Id: <20251013-opp_pcie-v5-4-eb64db2b4bd3@oss.qualcomm.com>
Date: Mon, 13 Oct 2025 16:23:31 +0530
From: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
To: Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
Stephen Boyd <sboyd@...nel.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kwilczynski@...nel.org>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org,
Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Subject: [PATCH v5 4/5] arm64: dts: qcom: x1e80100: Add opp-level to
indicate PCIe data rates
The existing OPP table for PCIe is shared across different link
configurations such as data rates 8GT/s x2 and 16GT/s x1. These
configurations often operate at the same frequency, allowing them
to reuse the same OPP entries. However, 8GT/s and 16 GT/s may have
different RPMh votes which cannot be represented accurately when
sharing a single OPP.
To address this, introduce an `opp-level` to indicate the PCIe data
rate and uniquely differentiate OPP entries even when the frequenc
is the same.
Although this platform does not currently suffer from this issue, the
change is introduced to support unification across platforms.
Append the opp level to name of the opp node to indicate both frequency
and level.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 98 +++++++++++++++++++++++++++-------
1 file changed, 78 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 51576d9c935decbc61a8e4200de83e739f7da814..6e931fbd409269be2fd1cc848bcaf0b4037bc793 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -3240,74 +3240,132 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
pcie3_opp_table: opp-table {
compatible = "operating-points-v2";
- /* GEN 1 x1 */
- opp-2500000 {
+ /* 2.5GT/s x1 */
+ opp-2500000-1 {
opp-hz = /bits/ 64 <2500000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <250000 1>;
+ opp-level = <1>;
};
- /* GEN 1 x2 and GEN 2 x1 */
- opp-5000000 {
+ /* 2.5 GT/s x2 */
+ opp-5000000-1 {
opp-hz = /bits/ 64 <5000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <500000 1>;
+ opp-level = <1>;
};
- /* GEN 1 x4 and GEN 2 x2 */
- opp-10000000 {
+ /* 2.5 GT/s x4 */
+ opp-10000000-1 {
opp-hz = /bits/ 64 <10000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <1000000 1>;
+ opp-level = <1>;
};
- /* GEN 1 x8 and GEN 2 x4 */
- opp-20000000 {
+ /* 2.5 GT/s x8 */
+ opp-20000000-1 {
opp-hz = /bits/ 64 <20000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <2000000 1>;
+ opp-level = <1>;
};
- /* GEN 2 x8 */
- opp-40000000 {
+ /* 5 GT/s x1 */
+ opp-5000000-2 {
+ opp-hz = /bits/ 64 <5000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ opp-peak-kBps = <500000 1>;
+ opp-level = <2>;
+ };
+
+ /* 5 GT/s x2 */
+ opp-10000000-2 {
+ opp-hz = /bits/ 64 <10000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ opp-peak-kBps = <1000000 1>;
+ opp-level = <2>;
+ };
+
+ /* 5 GT/s x4 */
+ opp-20000000-2 {
+ opp-hz = /bits/ 64 <20000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ opp-peak-kBps = <2000000 1>;
+ opp-level = <2>;
+ };
+
+ /* 5 GT/s x8 */
+ opp-40000000-2 {
opp-hz = /bits/ 64 <40000000>;
required-opps = <&rpmhpd_opp_low_svs>;
opp-peak-kBps = <4000000 1>;
+ opp-level = <2>;
};
- /* GEN 3 x1 */
- opp-8000000 {
+ /* 8 GT/s x1 */
+ opp-8000000-3 {
opp-hz = /bits/ 64 <8000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <984500 1>;
+ opp-level = <3>;
+ };
+
+ /* 8 GT/s x2 */
+ opp-16000000-3 {
+ opp-hz = /bits/ 64 <16000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ opp-peak-kBps = <1969000 1>;
+ opp-level = <3>;
+ };
+
+ /* 8 GT/s x4 */
+ opp-32000000-3 {
+ opp-hz = /bits/ 64 <32000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ opp-peak-kBps = <3938000 1>;
+ opp-level = <3>;
+ };
+
+ /* 8 GT/s x8 */
+ opp-64000000-3 {
+ opp-hz = /bits/ 64 <64000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ opp-peak-kBps = <7876000 1>;
+ opp-level = <3>;
};
- /* GEN 3 x2 and GEN 4 x1 */
- opp-16000000 {
+ /* 16 GT/s x1 */
+ opp-16000000-4 {
opp-hz = /bits/ 64 <16000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <1969000 1>;
+ opp-level = <4>;
};
- /* GEN 3 x4 and GEN 4 x2 */
- opp-32000000 {
+ /* 16 GT/s x2 */
+ opp-32000000-4 {
opp-hz = /bits/ 64 <32000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <3938000 1>;
+ opp-level = <4>;
};
- /* GEN 3 x8 and GEN 4 x4 */
- opp-64000000 {
+ /* 16 GT/s x4 */
+ opp-64000000-4 {
opp-hz = /bits/ 64 <64000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <7876000 1>;
+ opp-level = <4>;
};
- /* GEN 4 x8 */
- opp-128000000 {
+ /* 16 GT/s x8 */
+ opp-128000000-4 {
opp-hz = /bits/ 64 <128000000>;
required-opps = <&rpmhpd_opp_svs>;
opp-peak-kBps = <15753000 1>;
+ opp-level = <4>;
};
};
--
2.34.1
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