linux-kernel - Re: [PATCH 11/26] drm/xe: Allow the caller to pass guc_buf

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <12627457-669a-4bc7-a020-3bad4dd0ce25@intel.com>
Date: Mon, 13 Oct 2025 13:08:39 +0200
From: Michal Wajdeczko <michal.wajdeczko@...el.com>
To: Michał Winiarski <michal.winiarski@...el.com>, "Alex
 Williamson" <alex.williamson@...hat.com>, Lucas De Marchi
	<lucas.demarchi@...el.com>, Thomas Hellström
	<thomas.hellstrom@...ux.intel.com>, Rodrigo Vivi <rodrigo.vivi@...el.com>,
	Jason Gunthorpe <jgg@...pe.ca>, Yishai Hadas <yishaih@...dia.com>, Kevin Tian
	<kevin.tian@...el.com>, Shameer Kolothum
	<shameerali.kolothum.thodi@...wei.com>, <intel-xe@...ts.freedesktop.org>,
	<linux-kernel@...r.kernel.org>, <kvm@...r.kernel.org>
CC: <dri-devel@...ts.freedesktop.org>, Matthew Brost
	<matthew.brost@...el.com>, Jani Nikula <jani.nikula@...ux.intel.com>, "Joonas
 Lahtinen" <joonas.lahtinen@...ux.intel.com>, Tvrtko Ursulin
	<tursulin@...ulin.net>, David Airlie <airlied@...il.com>, Simona Vetter
	<simona@...ll.ch>, Lukasz Laguna <lukasz.laguna@...el.com>
Subject: Re: [PATCH 11/26] drm/xe: Allow the caller to pass guc_buf_cache size



On 10/11/2025 9:38 PM, Michał Winiarski wrote:
> An upcoming change will use GuC buffer cache as a place where GuC
> migration data will be stored, and the memory requirement for that is
> larger than indirect data.
> Allow the caller to pass the size based on the intended usecase.
> 
> Signed-off-by: Michał Winiarski <michal.winiarski@...el.com>
> ---
>  drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c | 2 +-
>  drivers/gpu/drm/xe/xe_guc.c                 | 4 ++--
>  drivers/gpu/drm/xe/xe_guc_buf.c             | 6 +++---
>  drivers/gpu/drm/xe/xe_guc_buf.h             | 2 +-
>  4 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> index d266882adc0e0..c273ce8087f56 100644
> --- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> +++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> @@ -72,7 +72,7 @@ static int guc_buf_test_init(struct kunit *test)
>  	kunit_activate_static_stub(test, xe_managed_bo_create_pin_map,
>  				   replacement_xe_managed_bo_create_pin_map);
>  
> -	KUNIT_ASSERT_EQ(test, 0, xe_guc_buf_cache_init(&guc->buf));
> +	KUNIT_ASSERT_EQ(test, 0, xe_guc_buf_cache_init(&guc->buf), SZ_8K);

SZ_8K added to wrong place ;)
>  
>  	test->priv = &guc->buf;
>  	return 0;
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index d94490979adc0..ccc7c60ae9b77 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -809,7 +809,7 @@ static int vf_guc_init_post_hwconfig(struct xe_guc *guc)
>  	if (err)
>  		return err;
>  
> -	err = xe_guc_buf_cache_init(&guc->buf);
> +	err = xe_guc_buf_cache_init(&guc->buf, SZ_8K);
>  	if (err)
>  		return err;
>  
> @@ -857,7 +857,7 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc)
>  	if (ret)
>  		return ret;
>  
> -	ret = xe_guc_buf_cache_init(&guc->buf);
> +	ret = xe_guc_buf_cache_init(&guc->buf, SZ_8K);
>  	if (ret)
>  		return ret;
>  
> diff --git a/drivers/gpu/drm/xe/xe_guc_buf.c b/drivers/gpu/drm/xe/xe_guc_buf.c
> index 1be26145f0b98..418ada00b99e3 100644
> --- a/drivers/gpu/drm/xe/xe_guc_buf.c
> +++ b/drivers/gpu/drm/xe/xe_guc_buf.c
> @@ -28,16 +28,16 @@ static struct xe_gt *cache_to_gt(struct xe_guc_buf_cache *cache)
>   * @cache: the &xe_guc_buf_cache to initialize
>   *
>   * The Buffer Cache allows to obtain a reusable buffer that can be used to pass
> - * indirect H2G data to GuC without a need to create a ad-hoc allocation.
> + * data to GuC or read data from GuC without a need to create a ad-hoc allocation.
>   *
>   * Return: 0 on success or a negative error code on failure.
>   */
> -int xe_guc_buf_cache_init(struct xe_guc_buf_cache *cache)
> +int xe_guc_buf_cache_init(struct xe_guc_buf_cache *cache, u32 size)
>  {
>  	struct xe_gt *gt = cache_to_gt(cache);
>  	struct xe_sa_manager *sam;
>  
> -	sam = __xe_sa_bo_manager_init(gt_to_tile(gt), SZ_8K, 0, sizeof(u32));

maybe we should promote this magic SZ_8K as 

#define XE_GUC_BUF_CACHE_DEFAULT_SIZE SZ_8K

> +	sam = __xe_sa_bo_manager_init(gt_to_tile(gt), size, 0, sizeof(u32));
>  	if (IS_ERR(sam))
>  		return PTR_ERR(sam);
>  	cache->sam = sam;
> diff --git a/drivers/gpu/drm/xe/xe_guc_buf.h b/drivers/gpu/drm/xe/xe_guc_buf.h
> index fe6b5ffe0d6eb..fe5cf3b183497 100644
> --- a/drivers/gpu/drm/xe/xe_guc_buf.h
> +++ b/drivers/gpu/drm/xe/xe_guc_buf.h
> @@ -11,7 +11,7 @@
>  
>  #include "xe_guc_buf_types.h"
>  
> -int xe_guc_buf_cache_init(struct xe_guc_buf_cache *cache);
> +int xe_guc_buf_cache_init(struct xe_guc_buf_cache *cache, u32 size);
>  u32 xe_guc_buf_cache_dwords(struct xe_guc_buf_cache *cache);
>  struct xe_guc_buf xe_guc_buf_reserve(struct xe_guc_buf_cache *cache, u32 dwords);
>  struct xe_guc_buf xe_guc_buf_from_data(struct xe_guc_buf_cache *cache,