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Message-ID: <176039992624.852221.13654333780922349248.b4-ty@gentoo.org>
Date: Tue, 14 Oct 2025 07:59:41 +0800
From: Yixun Lan <dlan@...too.org>
To: robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	paul.walmsley@...ive.com,
	palmer@...belt.com,
	aou@...s.berkeley.edu,
	alex@...ti.fr,
	Hendrik Hamerlinck <hendrik.hamerlinck@...mernet.be>
Cc: Yixun Lan <dlan@...too.org>,
	skhan@...uxfoundation.org,
	linux-kernel-mentees@...ts.linux.dev,
	devicetree@...r.kernel.org,
	linux-riscv@...ts.infradead.org,
	spacemit@...ts.linux.dev,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] riscv: dts: spacemit: add UART pinctrl combinations


On Wed, 17 Sep 2025 08:59:07 +0200, Hendrik Hamerlinck wrote:
> Add UART pinctrl configurations based on the SoC datasheet and the
> downstream Bianbu Linux tree. The drive strength values were taken from
> the downstream implementation, which uses medium drive strength.
> CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
> hardware flow control conditionally.
> 
> 
> [...]

Applied, thanks!

[1/1] riscv: dts: spacemit: add UART pinctrl combinations
      https://github.com/spacemit-com/linux/commit/1187f9b3f6ebde806289877fa710ffd58f950104

Best regards,
-- 
Yixun Lan


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