linux-kernel - [PATCH v7 09/10] arm64: dts: qcom: ipq5424: Add NSS clock controller node

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Message-ID: <20251014-qcom_ipq5424_nsscc-v7-9-081f4956be02@quicinc.com>
Date: Tue, 14 Oct 2025 22:35:34 +0800
From: Luo Jie <quic_luoj@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette
	<mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        "Varadarajan
 Narayanan" <quic_varada@...cinc.com>,
        Rob Herring <robh@...nel.org>,
        "Krzysztof Kozlowski" <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        "Anusha Rao" <quic_anusha@...cinc.com>,
        Devi Priya
	<quic_devipriy@...cinc.com>,
        Manikanta Mylavarapu
	<quic_mmanikan@...cinc.com>,
        Georgi Djakov <djakov@...nel.org>,
        Philipp Zabel
	<p.zabel@...gutronix.de>,
        Richard Cochran <richardcochran@...il.com>,
        Konrad
 Dybcio <konradybcio@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski@...aro.org>,
        <devicetree@...r.kernel.org>, <linux-pm@...r.kernel.org>,
        <netdev@...r.kernel.org>, <quic_kkumarcs@...cinc.com>,
        <quic_linchen@...cinc.com>, <quic_leiwei@...cinc.com>,
        <quic_pavir@...cinc.com>, <quic_suruchia@...cinc.com>,
        Luo Jie <quic_luoj@...cinc.com>,
        Konrad Dybcio
	<konrad.dybcio@....qualcomm.com>
Subject: [PATCH v7 09/10] arm64: dts: qcom: ipq5424: Add NSS clock
 controller node

NSS clock controller provides the clocks and resets to the networking
hardware blocks on the IPQ5424, such as PPE (Packet Process Engine) and
UNIPHY (PCS) blocks.

Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
---
 arch/arm64/boot/dts/qcom/ipq5424.dtsi | 32 +++++++++++++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index ef2b52f3597d..a3938f4db168 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -3,7 +3,7 @@
  * IPQ5424 device tree source
  *
  * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
- * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -815,6 +815,36 @@ apss_clk: clock-controller@...0000 {
 			#interconnect-cells = <1>;
 		};
 
+		clock-controller@...00000 {
+			compatible = "qcom,ipq5424-nsscc";
+			reg = <0 0x39b00000 0 0x100000>;
+			clocks = <&cmn_pll IPQ5424_XO_24MHZ_CLK>,
+				 <&cmn_pll IPQ5424_NSS_300MHZ_CLK>,
+				 <&cmn_pll IPQ5424_PPE_375MHZ_CLK>,
+				 <&gcc GPLL0_OUT_AUX>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>,
+				 <&gcc GCC_NSSCC_CLK>;
+			clock-names = "xo",
+				      "nss",
+				      "ppe",
+				      "gpll0_out",
+				      "uniphy0_rx",
+				      "uniphy0_tx",
+				      "uniphy1_rx",
+				      "uniphy1_tx",
+				      "uniphy2_rx",
+				      "uniphy2_tx",
+				      "bus";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			#interconnect-cells = <1>;
+		};
+
 		pcie3: pcie@...00000 {
 			compatible = "qcom,pcie-ipq5424", "qcom,pcie-ipq9574";
 			reg = <0x0 0x40000000 0x0 0xf1c>,

-- 
2.34.1