linux-kernel - Re: [RFC PATCH 0/4] riscv: tarce: Implement riscv trace pmu driver and perf support

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Message-ID: <CAJF2gTQNdRbB0JgAU8p1+13UEFKPF0BNfwzGavHz8DmzFJPF-A@mail.gmail.com>
Date: Tue, 14 Oct 2025 10:54:23 +0800
From: Guo Ren <guoren@...nel.org>
To: Anup Patel <apatel@...tanamicro.com>
Cc: paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu, 
	alex@...ti.fr, linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	cp0613@...ux.alibaba.com
Subject: Re: [RFC PATCH 0/4] riscv: tarce: Implement riscv trace pmu driver
 and perf support

On Mon, Oct 13, 2025 at 12:22 PM Anup Patel <apatel@...tanamicro.com> wrote:
>
> Hi Guo,
>
> On Thu, Sep 11, 2025 at 6:15 PM <cp0613@...ux.alibaba.com> wrote:
> >
> > From: Chen Pei <cp0613@...ux.alibaba.com>
> >
> > The RISC-V Trace Specification defines a standardized framework for
> > capturing and analyzing the execution of RISC-V processors. Its main
> > uses include: instruction and data tracing, real-time debugging, etc.
> > Similar to Intel-PT and ARM-CoreSight.
> >
> > According to the RISC-V Trace Control Interface specification [1].
> > There are two standard RISC-V trace protocols which will utilize
> > this RISC-V Trace Control Interface:
> > - RISC-V N-Trace (Nexus-based Trace) Specification
> > - Efficient Trace for RISC-V Specification
> > So, this is a complete guideline for any standard RISC-V trace
> > implementation.
> >
> > This series of patches is mainly used to start related work and
> > communication. It completes the following tasks:
> > 1. dt-bindings completes the basic definition of riscv trace
> >    component properties, but is still incomplete.
> > 2. Implemented the basic RISC-V Trace PMU driver, including
> >    support for the aux buffer.
> > 3. Implemented basic support for AUXTRACE integration with perf
> >    tools.
> >
> > There's still more work to be done, such as:
> > 1. Complete RISC-V Trace PMU implementation.
> > 2. The perf.data generation and parsing including AUXTRACE events.
> > 3. Taking RISC-V N-Trace as an example, implement the parsing of
> >    Nexus Trace data format, including support for perf report and
> >    perf script commands.
> > We are still sorting out.
> >
> > Any comments or suggestions are welcome.
> >
> > [1] https://github.com/riscv-non-isa/tg-nexus-trace.git
> >
> > Chen Pei (4):
> >   dt-bindings: riscv: Add trace components description
> >   riscv: event: Initial riscv trace driver support
> >   tools: perf: Support perf record with aux buffer for riscv trace
> >   riscv: trace: Support sink using dma buffer
> >
> >  .../riscv/trace/riscv,trace,encoder.yaml      |  41 +++
> >  .../riscv/trace/riscv,trace,funnel.yaml       |  46 ++++
> >  .../riscv/trace/riscv,trace,sink.yaml         |  37 +++
> >  arch/riscv/Kbuild                             |   1 +
> >  arch/riscv/Kconfig                            |   2 +
> >  arch/riscv/events/Kconfig                     |  11 +
> >  arch/riscv/events/Makefile                    |   3 +
> >  arch/riscv/events/riscv_trace.c               | 253 ++++++++++++++++++
> >  arch/riscv/events/riscv_trace.h               | 133 +++++++++
> >  arch/riscv/events/riscv_trace_encoder.c       | 109 ++++++++
> >  arch/riscv/events/riscv_trace_funnel.c        | 160 +++++++++++
> >  arch/riscv/events/riscv_trace_sink.c          | 100 +++++++
> >  tools/perf/arch/riscv/util/Build              |   3 +
> >  tools/perf/arch/riscv/util/auxtrace.c         |  33 +++
> >  tools/perf/arch/riscv/util/pmu.c              |  18 ++
> >  tools/perf/arch/riscv/util/riscv-trace.c      | 183 +++++++++++++
> >  tools/perf/arch/riscv/util/tsc.c              |  15 ++
> >  tools/perf/util/Build                         |   1 +
> >  tools/perf/util/auxtrace.c                    |   4 +
> >  tools/perf/util/auxtrace.h                    |   1 +
> >  tools/perf/util/riscv-trace.c                 | 162 +++++++++++
> >  tools/perf/util/riscv-trace.h                 |  18 ++
> >  22 files changed, 1334 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/riscv/trace/riscv,trace,encoder.yaml
> >  create mode 100644 Documentation/devicetree/bindings/riscv/trace/riscv,trace,funnel.yaml
> >  create mode 100644 Documentation/devicetree/bindings/riscv/trace/riscv,trace,sink.yaml
> >  create mode 100644 arch/riscv/events/Kconfig
> >  create mode 100644 arch/riscv/events/Makefile
> >  create mode 100644 arch/riscv/events/riscv_trace.c
> >  create mode 100644 arch/riscv/events/riscv_trace.h
> >  create mode 100644 arch/riscv/events/riscv_trace_encoder.c
> >  create mode 100644 arch/riscv/events/riscv_trace_funnel.c
> >  create mode 100644 arch/riscv/events/riscv_trace_sink.c
> >  create mode 100644 tools/perf/arch/riscv/util/auxtrace.c
> >  create mode 100644 tools/perf/arch/riscv/util/pmu.c
> >  create mode 100644 tools/perf/arch/riscv/util/riscv-trace.c
> >  create mode 100644 tools/perf/arch/riscv/util/tsc.c
> >  create mode 100644 tools/perf/util/riscv-trace.c
> >  create mode 100644 tools/perf/util/riscv-trace.h
> >
> > --
>
> Few months back we (Ventana) had informed everyone
> within RVI (particularly self-hosted trace TG) that we are
> working on Linux trace framework and drivers for the RISC-V
> community [1]. There are also publicly accessible RISE
> project pages already available for the trace efforts [2].\
Thx for reminding, I would reply on [1].

>
> This is yet another instance where ongoing efforts were
> totally ignored.
>
> --
> Anup
>
> [1] https://lists.riscv.org/g/sig-hypervisors/message/648
> [2] https://lf-rise.atlassian.net/wiki/spaces/HOME/pages/8591251/2025+-+Kernel+and+Virtualization+Priorities



-- 
Best Regards
 Guo Ren