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Message-Id: <20251014-macb-cleanup-v1-8-31cd266e22cd@bootlin.com>
Date: Tue, 14 Oct 2025 17:25:09 +0200
From: Théo Lebrun <theo.lebrun@...tlin.com>
To: Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Claudiu Beznea <claudiu.beznea@...on.dev>,
Richard Cochran <richardcochran@...il.com>,
Russell King <linux@...linux.org.uk>
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>,
Tawfik Bayouk <tawfik.bayouk@...ileye.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Grégory Clement <gregory.clement@...tlin.com>,
Benoît Monin <benoit.monin@...tlin.com>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Théo Lebrun <theo.lebrun@...tlin.com>
Subject: [PATCH net-next 08/15] net: macb: move bp->hw_dma_cap flags to
bp->caps
Drop bp->hw_dma_cap field and put its two flags into bp->caps.
On my specific config (eyeq5_defconfig), bloat-o-meter indicates:
- macb_main.o: Before=56251, After=56359, chg +0.19%
- macb_ptp.o: Before= 3976, After= 3952, chg -0.60%
Signed-off-by: Théo Lebrun <theo.lebrun@...tlin.com>
---
drivers/net/ethernet/cadence/macb.h | 10 ++--------
drivers/net/ethernet/cadence/macb_main.c | 28 ++++++++++++++--------------
drivers/net/ethernet/cadence/macb_ptp.c | 16 +++++++++-------
3 files changed, 25 insertions(+), 29 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 9d21ec482c8c62da28f9d5ff35d5ca46f293eb64..b3a4c9534240a3195adbd7acd325cdaafab60039 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -777,6 +777,8 @@
#define MACB_CAPS_GIGABIT_MODE_AVAILABLE BIT(18)
#define MACB_CAPS_SG_DISABLED BIT(19)
#define MACB_CAPS_MACB_IS_GEM BIT(20)
+#define MACB_CAPS_DMA_64B BIT(21)
+#define MACB_CAPS_DMA_PTP BIT(22)
/* LSO settings */
#define MACB_LSO_UFO_ENABLE 0x01
@@ -854,11 +856,6 @@ struct macb_dma_desc {
};
#ifdef MACB_EXT_DESC
-#define HW_DMA_CAP_32B 0
-#define HW_DMA_CAP_64B (1 << 0)
-#define HW_DMA_CAP_PTP (1 << 1)
-#define HW_DMA_CAP_64B_PTP (HW_DMA_CAP_64B | HW_DMA_CAP_PTP)
-
struct macb_dma_desc_64 {
u32 addrh;
u32 resvd;
@@ -1349,9 +1346,6 @@ struct macb {
struct phy *sgmii_phy; /* for ZynqMP SGMII mode */
-#ifdef MACB_EXT_DESC
- uint8_t hw_dma_cap;
-#endif
spinlock_t tsu_clk_lock; /* gem tsu clock locking */
unsigned int tsu_rate;
struct ptp_clock *ptp_clock;
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 44a411662786ca4f309d6f9389b0d36819fc40ad..44b96bf53ff6bcb351b27a165451cac852528501 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -124,9 +124,9 @@ static unsigned int macb_dma_desc_get_size(struct macb *bp)
unsigned int desc_size = sizeof(struct macb_dma_desc);
#ifdef MACB_EXT_DESC
- if (bp->hw_dma_cap & HW_DMA_CAP_64B)
+ if (bp->caps & MACB_CAPS_DMA_64B)
desc_size += sizeof(struct macb_dma_desc_64);
- if (bp->hw_dma_cap & HW_DMA_CAP_PTP)
+ if (bp->caps & MACB_CAPS_DMA_PTP)
desc_size += sizeof(struct macb_dma_desc_ptp);
#endif
@@ -136,8 +136,8 @@ static unsigned int macb_dma_desc_get_size(struct macb *bp)
static unsigned int macb_adj_dma_desc_idx(struct macb *bp, unsigned int desc_idx)
{
#ifdef MACB_EXT_DESC
- bool is_ptp = bp->hw_dma_cap & HW_DMA_CAP_PTP;
- bool is_64b = bp->hw_dma_cap & HW_DMA_CAP_64B;
+ bool is_ptp = bp->caps & MACB_CAPS_DMA_PTP;
+ bool is_64b = bp->caps & MACB_CAPS_DMA_64B;
return desc_idx * (1 + is_64b + is_ptp);
#else
@@ -475,7 +475,7 @@ static void macb_init_buffers(struct macb *bp)
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
/* Single register for all queues' high 32 bits. */
- if (bp->hw_dma_cap & HW_DMA_CAP_64B) {
+ if (bp->caps & MACB_CAPS_DMA_64B) {
macb_writel(bp, RBQPH,
upper_32_bits(bp->queues[0].rx_ring_dma));
macb_writel(bp, TBQPH,
@@ -1009,7 +1009,7 @@ static void macb_set_addr(struct macb *bp, struct macb_dma_desc *desc, dma_addr_
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
struct macb_dma_desc_64 *desc_64;
- if (bp->hw_dma_cap & HW_DMA_CAP_64B) {
+ if (bp->caps & MACB_CAPS_DMA_64B) {
desc_64 = macb_64b_desc(bp, desc);
desc_64->addrh = upper_32_bits(addr);
/* The low bits of RX address contain the RX_USED bit, clearing
@@ -1028,14 +1028,14 @@ static dma_addr_t macb_get_addr(struct macb *bp, struct macb_dma_desc *desc)
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
struct macb_dma_desc_64 *desc_64;
- if (bp->hw_dma_cap & HW_DMA_CAP_64B) {
+ if (bp->caps & MACB_CAPS_DMA_64B) {
desc_64 = macb_64b_desc(bp, desc);
addr = ((u64)(desc_64->addrh) << 32);
}
#endif
addr |= MACB_BF(RX_WADDR, MACB_BFEXT(RX_WADDR, desc->addr));
#ifdef CONFIG_MACB_USE_HWSTAMP
- if (bp->hw_dma_cap & HW_DMA_CAP_PTP)
+ if (bp->caps & MACB_CAPS_DMA_PTP)
addr &= ~GEM_BIT(DMA_RXVALID);
#endif
return addr;
@@ -2301,7 +2301,7 @@ static netdev_tx_t macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
#ifdef CONFIG_MACB_USE_HWSTAMP
if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
- (bp->hw_dma_cap & HW_DMA_CAP_PTP))
+ (bp->caps & MACB_CAPS_DMA_PTP))
skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
#endif
@@ -2781,11 +2781,11 @@ static void macb_configure_dma(struct macb *bp)
dmacfg &= ~GEM_BIT(ADDR64);
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
- if (bp->hw_dma_cap & HW_DMA_CAP_64B)
+ if (bp->caps & MACB_CAPS_DMA_64B)
dmacfg |= GEM_BIT(ADDR64);
#endif
#ifdef CONFIG_MACB_USE_HWSTAMP
- if (bp->hw_dma_cap & HW_DMA_CAP_PTP)
+ if (bp->caps & MACB_CAPS_DMA_PTP)
dmacfg |= GEM_BIT(RXEXT) | GEM_BIT(TXEXT);
#endif
netdev_dbg(bp->dev, "Cadence configure DMA with 0x%08x\n",
@@ -3563,7 +3563,7 @@ static int gem_get_ts_info(struct net_device *dev,
{
struct macb *bp = netdev_priv(dev);
- if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0) {
+ if (!(bp->caps & MACB_CAPS_DMA_PTP)) {
ethtool_op_get_ts_info(dev, info);
return 0;
}
@@ -4351,7 +4351,7 @@ static void macb_configure_caps(struct macb *bp,
"GEM doesn't support hardware ptp.\n");
else {
#ifdef CONFIG_MACB_USE_HWSTAMP
- bp->hw_dma_cap |= HW_DMA_CAP_PTP;
+ bp->caps |= MACB_CAPS_DMA_PTP;
bp->ptp_info = &gem_ptp_info;
#endif
}
@@ -5518,7 +5518,7 @@ static int macb_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "failed to set DMA mask\n");
goto err_out_free_netdev;
}
- bp->hw_dma_cap |= HW_DMA_CAP_64B;
+ bp->caps |= MACB_CAPS_DMA_64B;
}
#endif
platform_set_drvdata(pdev, dev);
diff --git a/drivers/net/ethernet/cadence/macb_ptp.c b/drivers/net/ethernet/cadence/macb_ptp.c
index a63bf29c4fa81b95f10aec8b8fe9918022e196d6..f4ab379f28493cffe30275fd335844ae2fefc89a 100644
--- a/drivers/net/ethernet/cadence/macb_ptp.c
+++ b/drivers/net/ethernet/cadence/macb_ptp.c
@@ -28,14 +28,16 @@
static struct macb_dma_desc_ptp *macb_ptp_desc(struct macb *bp,
struct macb_dma_desc *desc)
{
- if (bp->hw_dma_cap == HW_DMA_CAP_PTP)
- return (struct macb_dma_desc_ptp *)
- ((u8 *)desc + sizeof(struct macb_dma_desc));
- if (bp->hw_dma_cap == HW_DMA_CAP_64B_PTP)
+ if (!(bp->caps & MACB_CAPS_DMA_PTP))
+ return NULL;
+
+ if (bp->caps & MACB_CAPS_DMA_64B)
return (struct macb_dma_desc_ptp *)
((u8 *)desc + sizeof(struct macb_dma_desc)
+ sizeof(struct macb_dma_desc_64));
- return NULL;
+ else
+ return (struct macb_dma_desc_ptp *)
+ ((u8 *)desc + sizeof(struct macb_dma_desc));
}
static int gem_tsu_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts,
@@ -380,7 +382,7 @@ int gem_get_hwtst(struct net_device *dev,
struct macb *bp = netdev_priv(dev);
*tstamp_config = bp->tstamp_config;
- if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0)
+ if (!(bp->caps & MACB_CAPS_DMA_PTP))
return -EOPNOTSUPP;
return 0;
@@ -407,7 +409,7 @@ int gem_set_hwtst(struct net_device *dev,
struct macb *bp = netdev_priv(dev);
u32 regval;
- if ((bp->hw_dma_cap & HW_DMA_CAP_PTP) == 0)
+ if (!(bp->caps & MACB_CAPS_DMA_PTP))
return -EOPNOTSUPP;
switch (tstamp_config->tx_type) {
--
2.51.0
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